研究目的
Investigating the electrical properties and passivation mechanism of ultra-thin oxide layers in interaction with poly-Si layers in silicon solar cells.
研究成果
The study concludes that higher annealing temperatures lead to higher pinhole densities but do not necessarily correlate with passivation quality. The vertical current path density shows a qualitative behavior similar to the recombination current density, indicating optimal passivation conditions. Different mechanisms for passivation and electron transport are suggested, with further research needed on microstructural and chemical changes.
研究不足
The study is limited by the lateral conductivity of the polycrystalline Si layer and the challenge of correlating local spots of increased conductivity with pinhole density.
1：Experimental Design and Method Selection:
The study involves high-resolution electrical evaluation of the current path density through the interfacial oxide by conductive AFM using a newly developed image calculation software tool.
2：Sample Selection and Data Sources:
Industrially produced monocrystalline silicon wafers with specific orientations and resistivities are used. Oxide layers are produced by different processes, and poly-Si layers are produced via n+ PECVD.
3：List of Experimental Equipment and Materials:
Conductive AFM, PECVD equipment, laser ablation tools, and etching chemicals.
4：Experimental Procedures and Operational Workflow:
Samples are annealed at different temperatures, and QSSPC measurements are taken to determine optimal passivation parameters. Conductive AFM measurements are carried out with specific settings.
5：Data Analysis Methods:
The current maps are evaluated using the in-house developed vertical current path counter (VCP) software.
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