研究目的
To develop a compact silicon-photonic receiver integrated with a 28-nm CMOS transimpedance amplifier for high-speed and high-efficiency operation in optical interconnections.
研究成果
The developed silicon-photonic receiver demonstrates high-speed and high-efficiency operation, suitable for practical use at high temperatures. The design techniques and components used contribute to its performance, making it a promising solution for optical interconnections.
研究不足
The study focuses on a specific design and does not explore variations in materials or configurations that might offer different performance characteristics. The experimental setup is limited to controlled conditions, and real-world applications may present additional challenges.
1：Experimental Design and Method Selection:
The receiver was designed using a photonics—electronics convergence design technique, focusing on the interfaces between optical and electrical components. Optical pins were used for alignment between multimode fibers and germanium photodetectors. An aluminum stripline was used between the PD and TIA to enhance bandwidth. Coplanar waveguides on an etched SOI wafer were designed for low insertion loss.
2：Sample Selection and Data Sources:
The study used a fabricated 5 × 5 mm2 chip-scale optical I/O core receiver integrated with a CMOS-TIA chip.
3：List of Experimental Equipment and Materials:
The setup included a LiNbO3 Mach–Zehnder modulator, a tunable laser source, and a sampling oscilloscope for eye-diagram measurement and jitter analysis.
4：Experimental Procedures and Operational Workflow:
Optical signals were generated and input into the receiver through a variable optical attenuator. Eye-diagram measurements and jitter analysis were performed, and bit error rates were tested using an error detector.
5：Data Analysis Methods:
The performance of the receiver was evaluated based on sensitivity, power consumption, and error-free operation at different temperatures.
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