研究目的
To introduce the concept of a novel high-speed photodetector with controlled relocation of carrier density peaks for on-chip optical interconnections in integrated circuits, aiming to achieve subpicosecond response time and sufficient sensitivity.
研究成果
The proposed photodetector design with controlled relocation of carrier density peaks offers a promising solution for high-speed on-chip optical interconnections, achieving a subpicosecond response time. The combined numerical model provides a valuable tool for estimating the device's performance, with simulation results indicating a steep photocurrent back edge duration of about 0.1 ps. Future research will extend to two-dimensional drift-diffusion simulation to further refine the model.
研究不足
The study focuses primarily on the response time and technological compatibility of the photodetector with lasers-modulators, leaving other parameters such as dark current, nonlinearity, and noise equivalent power less explored. The simulation assumes idealized conditions, such as instant drop of optical input and step control voltage, which may not fully represent real-world scenarios.