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Photodetector with Controlled Relocation of Carrier Density Peaks: Concept and Numerical Simulation

DOI:10.3390/photonics7010021 期刊:Photonics 出版年份:2020 更新时间:2025-09-23 15:19:57
摘要: Modern electronics faces the degradation of metal interconnection performance in integrated circuits with nanoscale feature dimensions of transistors. The application of constructively and technologically integrated optical links instead of metal wires is a promising way of the problem solution. Previously, we proposed the advanced design of an on-chip injection laser with an AIIIBV nanoheterostructure, and a functionally integrated optical modulator. To implement the efficient laser-modulator-based optical interconnections, technologically compatible photodetectors with subpicosecond response time and sufficient sensitivity are required. In this paper, we introduce the concept of a novel high-speed photodetector with controlled relocation of carrier density peaks. The device includes a traditional p-i-n photosensitive junction and an orthogonally oriented control heterostructure. The transverse electric field displaces the peaks of electron and hole densities into the regions with low carrier mobilities and lifetimes during the back edge of an optical pulse. This relocation results in the fast decline of photocurrent that does not depend on the longitudinal transport of electrons and holes. We develop a combined numerical model based on the Schrodinger-Poisson equation system to estimate the response time of the photodetector. According to the simulation results, the steep part of the photocurrent back edge has a duration of about 0.1 ps.
作者: Ivan Pisarenko,Eugeny Ryndin
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To introduce the concept of a novel high-speed photodetector with controlled relocation of carrier density peaks for on-chip optical interconnections in integrated circuits, aiming to achieve subpicosecond response time and sufficient sensitivity.

The proposed photodetector design with controlled relocation of carrier density peaks offers a promising solution for high-speed on-chip optical interconnections, achieving a subpicosecond response time. The combined numerical model provides a valuable tool for estimating the device's performance, with simulation results indicating a steep photocurrent back edge duration of about 0.1 ps. Future research will extend to two-dimensional drift-diffusion simulation to further refine the model.

The study focuses primarily on the response time and technological compatibility of the photodetector with lasers-modulators, leaving other parameters such as dark current, nonlinearity, and noise equivalent power less explored. The simulation assumes idealized conditions, such as instant drop of optical input and step control voltage, which may not fully represent real-world scenarios.

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