研究目的
Investigating the electrical characteristics and interface state densities of Re/n-type Si Schottky barrier diodes prepared by pulsed laser deposition (PLD) method at room temperature.
研究成果
The study successfully analyzed the electrical characteristics and interface state densities of Re/n-type Si Schottky barrier diodes at room temperature. The diodes exhibited thermionic emission at low voltages and space charge limited conduction at higher voltages. The interface state densities were found to be significantly influenced by the series resistance. The findings contribute to the understanding of Schottky barrier diodes and their potential applications in electronic devices.
研究不足
The study is limited to room temperature measurements and does not explore the effects of varying temperatures on the electrical characteristics of the Schottky barrier diodes. Additionally, the impact of different interfacial layers or materials on the diode performance is not investigated.
1：Experimental Design and Method Selection:
The study involved the preparation of Re/n-type Si Schottky barrier diodes using the pulsed laser deposition (PLD) method. The electrical characteristics were examined through current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature.
2：Sample Selection and Data Sources:
n-type silicon (Si) substrate with (100) surface orientation, 20 Ω-cm resistivity, and 1.56 × 1015 cm?3 carrier concentration was used. Ohmic back contact was made using Au metal, and Schottky contacts were formed with Re metal.
3：56 × 1015 cm?3 carrier concentration was used. Ohmic back contact was made using Au metal, and Schottky contacts were formed with Re metal.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: Equipment included an Elma Elmasonic S40H 4.25 Liter Heated Ultrasonic Cleaner, PLD system, Keithley 4200 I-V source, and HP model 4192A LF impedance analyser. Materials included high-purity Au and Re metals.
4：25 Liter Heated Ultrasonic Cleaner, PLD system, Keithley 4200 I-V source, and HP model 4192A LF impedance analyser. Materials included high-purity Au and Re metals.
Experimental Procedures and Operational Workflow:
4. Experimental Procedures and Operational Workflow: The Si wafer was chemically cleaned, and ohmic contacts were formed. Re Schottky contacts were deposited via PLD. I-V and C-V measurements were conducted at room temperature.
5：Data Analysis Methods:
The data were analyzed to determine electrical properties such as ideality factor, barrier height, series resistance, and interface state densities using various calculation methods including Cheung's and Norde's methods.
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