研究目的
Investigating the integration of 14nm-FinFET CMOS with Silicon Photonics (SiPh) technology to enable ultra-low power Optical I/O transceivers with high bandwidth density.
研究成果
The hybrid 14nm-FinFET CMOS-Silicon Photonics technology platform demonstrates significant advancements in power efficiency and bandwidth density for optical I/O transceivers, with potential for further improvements.
研究不足
Potential optimizations in SiPh device designs and CMOS circuit layouts could further improve modulation rates and link margin.
1：Experimental Design and Method Selection:
The study employs a hybrid FinFET CMOS-SiPh technology platform for designing optical I/O transceivers.
2：Sample Selection and Data Sources:
Utilizes 300mm SOI wafers for SiPh chips and GlobalFoundries 14LPP technology for FinFET CMOS chips.
3：List of Experimental Equipment and Materials:
Includes Si ring modulators, Ge waveguide photodetectors, and microbump flip-chip integration.
4：Experimental Procedures and Operational Workflow:
Describes the fabrication of SiPh and FinFET CMOS chips, their integration, and testing under various conditions.
5：Data Analysis Methods:
Analyzes performance metrics such as power consumption, bandwidth density, and data transmission quality.
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