研究目的
To investigate the achievable efficiency and gravimetric power density of a fault-tolerant modular multi-cell three-phase inverter designed for next generation aerospace applications, meeting targets of efficiency >98% and power density >10 kW/kg.
研究成果
The modular multi-cell Stacked Polyphase Bridge (SPB) inverter with GaN semiconductors and cell-level redundancy achieves high efficiency (99%) and gravimetric power density (22.8 kW/kg), meeting aerospace targets. It offers superior reliability through redundancy and scalability, making it a promising solution for next-generation More Electric Aircraft applications. Future work could involve experimental validation and integration with multi-phase machines.
研究不足
The study is theoretical and relies on analytical models, which may not capture all real-world effects such as thermal management complexities, electromagnetic interference, or manufacturing variations. The optimization assumes ideal conditions (e.g., infinite switching speed in initial analysis) and does not include practical constraints like cost or availability of components. Reliability models assume constant failure rates, which may not hold in all scenarios. The focus is on the power stage; control and measurement circuits are not deeply analyzed.
1：Experimental Design and Method Selection:
The study uses analytical models for semiconductor losses, reliability functions, and optimization algorithms to evaluate multi-cell inverter topologies. It includes performance analysis based on figures of merit (FoM) for semiconductors, reliability modeling with redundancy approaches, and multi-objective optimization for efficiency and power density.
2：Sample Selection and Data Sources:
Specifications from Table I (e.g., DC-link voltage 1000 V, output power 45 kW) are used. Data on commercially available power semiconductors (Si, SiC, GaN) are sourced from manufacturers and literature.
3：List of Experimental Equipment and Materials:
Power semiconductors (e.g., Wolfspeed C2M0045170D, Gan Systems GS66516B-T, EPC EPC2047), inductors, capacitors, heat-sinks, and PCBs for gate drivers and control circuits. Specific models and brands are detailed in the paper.
4：Experimental Procedures and Operational Workflow:
The methodology involves sweeping design variables (number of cells N, switching frequency fsw), calculating losses and weights using developed models, and optimizing for Pareto front in efficiency-power density space. No physical experiments are conducted; it is a theoretical and simulation-based study.
5：Data Analysis Methods:
Analytical models for semiconductor losses (switching and conduction), reliability functions (exponential decay with constant failure rate), and optimization using software tools (e.g., for inductor design) are employed. Results are visualized in plots and tables.
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