研究目的
To develop an LUT-free carrier recovery architecture for intradyne optical DPSK receivers to reduce DSP hardware resources, power consumption, and process clocks for cost-effective transceivers in access networks.
研究成果
The LUT-free carrier recovery architecture significantly reduces hardware resources (40% fewer adders, 42% fewer multipliers), process clocks (61% reduction), and power consumption (85% reduction) compared to previous methods, while achieving high performance with -54 dBm sensitivity at BER=10-3, effective frequency error correction, and robustness in a 6.25 GHz spaced udWDM grid, making it suitable for cost-effective transceivers in access networks.
研究不足
The experiment is limited to DPSK modulation; extension to higher modulations like QPSK is for future research. The optical frequency dithering test is constrained by the laser's FM response, limiting measurements to 800 kHz. The system assumes single polarization and manual adjustment.
1：Experimental Design and Method Selection:
The experiment involves designing and implementing a carrier recovery architecture on an FPGA for real-time evaluation. The method includes simplifying frequency compensation by avoiding mth-power operations and LUTs, using mathematical operations for frequency estimation and compensation.
2：Sample Selection and Data Sources:
Non-return-to-zero pseudo random binary sequences (NRZ-PRBS) data at 1.25 Gb/s from a pulse-pattern generator are used.
3：25 Gb/s from a pulse-pattern generator are used. List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: Equipment includes DFB lasers, single-mode fiber (25 km), variable optical attenuator, 3x3 coupler, photodiodes, Bessel filters, ADCs, and an ML605 Xilinx Virtex-6 FPGA board.
4：Experimental Procedures and Operational Workflow:
The setup involves direct phase modulation of a DFB laser, transmission through fiber, attenuation, coherent reception with a 3x3 coupler and photodiodes, analog signal processing, digitization with ADCs, and DSP on the FPGA including deskew, clock recovery, normalization, and the proposed carrier recovery.
5：Data Analysis Methods:
Performance is evaluated based on bit error rate (BER) measurements, sensitivity, frequency error correction, robustness to laser drifts, and tolerance to phase noise and channel spacing.
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FPGA
Virtex-6
Xilinx
Implementation of digital signal processing for carrier recovery and other DSP subsystems in the coherent receiver.
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DFB Laser
Used as transmitter and local oscillator lasers for optical signal generation and coherent detection.
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Single-Mode Fiber
Transmission medium for the optical signal over 25 km.
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Variable Optical Attenuator
Emulates optical distribution network losses by attenuating the signal.
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3x3 Coupler
Part of the optical front-end for beating the incoming signal with the local oscillator to provide phase-diversity operation.
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Photodiode
Detects optical signals and converts them to electrical signals; three are used in the setup.
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Bessel Filter
4th-order
Low-pass filtering for anti-aliasing and noise suppression in the analog domain.
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ADC
Converts analog signals to digital for processing by the FPGA; two channels are used.
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Pulse-Pattern Generator
Generates NRZ-PRBS data at 1.25 Gb/s for transmission.
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