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- 摘要
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Optimization Methods for Evaluating PV Hosting Capacity of Distribution Circuits
摘要： We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors. An all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin. It also reduces 1/f noise and supply pushing, thus allowing the ADPLL, after settling, to reduce its sampling rate or shut it off entirely during a direct DCO data modulation. The switching power amplifier integrates its matching network while operating in class-E/F2 to maximally enhance its efficiency at low voltage. The transmitter is realized in 28 nm digital CMOS and satisfies all metal density and other manufacturing rules. It consumes 3.6 mW/5.5 mW while delivering 0 dBm/3 dBm RF power in Bluetooth Low-Energy mode.
关键词： Bluetooth Low-Energy,low-voltage oscillator,class-E/F2 power amplifier,All-digital PLL,low-power switching current-source transmitter,Internet of Things (IoT)
更新于2025-09-23 15:21:01
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[IEEE 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Paris, France (2019.9.1-2019.9.6)] 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Radiation from junctions between two-dimensional plasmonic waveguides
摘要： We propose a digitally controlled injection-locked RF oscillator with an auxiliary loop as an alternative to the conventional capacitive fine-tuning of an LC-tank. The oscillator is injection locked to a time-delayed version of its resonating voltage and its frequency is modulated by manipulating the phase and amplitude of injected current. The injection strength can be programmed for the DCO step size to be as fine as 9 kHz at 4 GHz. Alternatively, with large injection strength, the tuning range can reach up to 200 MHz. The proposed oscillator is experimentally verified in TSMC 40 nm digital CMOS.
关键词： multi-stage noise ΣΔ (MASH),digitally controlled oscillator (DCO),digitally controlled delay (DCD),digital-to-frequency converter (DFC),All-digital PLL (ADPLL),digital phase rotator (DPR)
更新于2025-09-19 17:13:59
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An Optimum Injection-Timing Tracking Loop for 5-GHz, 1.13-mW/GHz RO-based Injection-Locked PLL with 152-fs Integrated Jitter
摘要： An injection-locked phase-locked loop (ILPLL) which continuously tracks the injection timing to achieve improved jitter performance is presented. When the injection timing is not precisely matched with the edges of the oscillator clock, the performance of ILPLL such as jitter and reference spur degrades significantly. To find an optimum injection timing, a calibration technique is proposed that continuously monitors the error information from the bang-bang phase and frequency detector (BBPFD) when the injection of the reference clock is intentionally omitted every other cycle. The timing calibrator enables a robust ILPLL operation over the process, voltage, and temperature (PVT) variations. The proposed ILPLL fabricated in 28-nm CMOS technology occupies 0.03 mm2 and consumes 5.65 mW at 5 GHz with 0.9-V supply voltage. The measured jitter integrated from 1 kHz to 40 MHz is 152 fs, and the spur levels at the reference and 2nd subharmonic are –62 dBc and –53 dBc, respectively.
关键词： half-edge injection,injection-locked oscillator (ILO),optimum injection timing,injection-locked PLL (ILPLL),All-digital PLL (ADPLL)
更新于2025-09-10 09:29:36