- 标题
- 摘要
- 关键词
- 实验方案
- 产品
过滤筛选
- 2018
- contrast stretch
- CMOS image sensor
- point-of-care (POC) diagnosis
- bio-microfluidic imaging
- Optoelectronic Information Science and Engineering
- Xi’an University of Technology
-
An IC-level countermeasure against laser fault injection attack by information leakage sensing based on laser-induced opto-electric bulk current density
摘要： Laser fault injection (LFI) attack on cryptographic processor ICs is a critical threat to information systems. This paper proposes an IC-level integrated countermeasure by employing an information leakage sensor against this LFI attack. Distributed bulk current sensors monitor abnormal bulk current density caused by laser irradiation for LFI. A time-interleaved sensor operation and sensitivity tuning can obtain partial leakage bit information of secret key with small layout area penalty. Based on the leakage information, the secret key can be securely updated for realizing high-availability resilient systems. The test chip was designed and fabricated in 0.18μm standard CMOS, integrating a 128-bit Advanced Encryption Standard (AES) cryptographic processor with the proposed information leakage sensor.
关键词： information leakage sensor,cryptographic processor,Laser fault injection,AES,CMOS,bulk current density
更新于2025-09-23 15:19:57
-
[IEEE 2019 International Conference on Artificial Intelligence and Advanced Manufacturing (AIAM) - Dublin, Ireland (2019.10.16-2019.10.18)] 2019 International Conference on Artificial Intelligence and Advanced Manufacturing (AIAM) - A Dynamic Real-Time Three-Dimensional Attitude Reconstruction Method Based on Multi-Core Optical Fiber Subtitle as Needed
摘要： We have developed a 5 × 5 mm2 compact silicon-photonic receiver with a 28-nm CMOS transimpedance-amplifier (TIA) chip. The receiver chip was designed using a photonics—electronics convergence design technique for the realization of high-speed and high-efficiency operation because the interfaces of the optical and electrical components greatly influence the receiver characteristics. Optical pins were used to obtain easy optical alignment between the multimode fibers and the germanium photodetectors. An aluminum stripline between the PD and the TIA enhanced the 3-dB bandwidth because its characteristic impedance is greater than the TIA input impedance. Coplanar waveguides (CPWs) on the etched SOI wafer achieved a low insertion loss because the overlap between the electric fields of the CPWs and the silicon layer was reduced. We demonstrated 25-Gb/s error-free operation at both 25 and at 85 °C. The minimum sensitivities and power consumptions of the receivers were ?11.0 dBm and 2.3 mW/Gb/s at 25 °C and ?10.2 dBm and 2.5 mW/Gb/s at 85 °C, respectively. These results show that our receiver can be applied for practical use at high temperatures.
关键词： CMOS transimpedance amplifier,multimode fiber transmission,optoelectronic integrated circuit,optical interconnections,optical receivers,silicon photonics
更新于2025-09-23 15:19:57
-
[IEEE ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) - Cracow, Poland (2019.9.23-2019.9.26)] ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) - A Hybrid THz Imaging System With a 100-Pixel CMOS Imager and a 3.25a??3.50 THz Quantum Cascade Laser Frequency Comb
摘要： The terahertz frequency range beyond 3 THz has exciting potential to have a transformative impact in a wide range of applications, including chemical and biomedical sensing, spectroscopy, imaging, and short-distance wireless communication. While there have been significant advancements in silicon-based THz imagers in the frequency ranges below 1 THz, technological development beyond 3 THz has been impeded by the lack of solid-state sources in this frequency range. In addition, the design space beyond 3 THz opens up fundamentally new challenges across electronics and the electromagnetic interface. In this spectral range, the wavelength is small enough (λox ≈ 50 μm at 3 THz) that a vertical via from the top antenna layer to the detector is a distributed element (transmission line or radiator). In this letter, we follow a careful circuits-electromagnetics co-design approach toward a hybrid imaging system with a 100-pixel CMOS imager that interfaces with a THz quantum cascade laser frequency comb that spans 3.25–3.5 THz with mode spacing of 17 GHz. The array chip, while designed for an optimal operation across 2.7–2.9 THz, demonstrates an average noise equivalent power (NEP) (across pixels) of 1260 pW/√Hz between 3.25–3.5 THz and a projected NEP of 284 pW/√Hz across the design range of 2.7–2.9 THz. To the best of our knowledge, we demonstrate for the first time full THz imaging in a hybrid quantum cascade laser (QCL)–CMOS fashion. This approach allows future works to leverage both QCL and CMOS technologies to demonstrate new technological advances for systems in the 1–10 THz range.
关键词： quantum cascade laser,THz imaging,terahertz,detector,imaging,CMOS,silicon,hybrid imaging
更新于2025-09-23 15:19:57
-
[IEEE 2019 International Aegean Conference on Electrical Machines and Power Electronics (ACEMP) & 2019 International Conference on Optimization of Electrical and Electronic Equipment (OPTIM) - Istanbul, Turkey (2019.8.27-2019.8.29)] 2019 International Aegean Conference on Electrical Machines and Power Electronics (ACEMP) & 2019 International Conference on Optimization of Electrical and Electronic Equipment (OPTIM) - Identifying Internal Defects of Photovoltaic Panels Using Sweep Frequency Response Analysis
摘要： In this paper, we propose a discrete-time IIR low-pass ?lter that achieves a high-order of ?ltering through a charge-sharing rotation. Its sampling rate is then multiplied through pipelining. The ?rst stage of the ?lter can operate in either a voltage-sampling or charge-sampling mode. It uses switches, capacitors and a simple gm-cell, rather than opamps, thus being compatible with digital nanoscale technology. In the voltage-sampling mode, the gm-cell is bypassed so the ?lter is fully passive. A 7th-order ?lter prototype operating at 800 MS/s sampling rate is implemented in TSMC 65 nm CMOS. Bandwidth of this ?lter is programmable between 400 kHz to 30 MHz with 100 dB maximum stop-band rejection. Its IIP3 is +21 dBm and the averaged spot noise is 4.57 nV/ Hz. It consumes 2 mW at 1.2 V and occupies 0.42 mm2.
关键词： switched capacitor,low power,high linearity,IIR,low-pass ?lter,low noise,recon?gurable,high order,real pole,discrete time,digital equalization,passive,CMOS
更新于2025-09-23 15:19:57
-
[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Autonomous Path Planning by Unmanned Aerial Vehicle (UAV) for Precise Monitoring of Large-Scale PV plants
摘要： This paper presents a 3.6 GHz low-noise fractional-N digital phase-locked loop (PLL) that achieves low in-band phase noise. Phase detection is carried out by a proposed 10-bit, 0.8 ps resolution time-to-digital converter (TDC) using a charge pump and a successive-approximation-register analog-to-digital converter (SAR-ADC) with low power and small area. The latency of the TDC is addressed by the designed building blocks. The fractional spurs are reduced by dual-loop least-mean-square (LMS) calibration. A (cid:2)(cid:3)-less and MOS varactor-less LC digitally-controlled oscillator (DCO) is proposed whose frequency resolution is enhanced to 7 kHz (or a unit variable capacitance of 2.6 aF) using a bridging capacitor technique. A prototype chip is fabricated using a 65 nm CMOS process, occupying an active area of 0.38 mm2 and consuming a power of 9.7 mW at a reference frequency of 50 MHz. The measured in-band phase noise is 107.8 dBc/Hz to 110.0 dBc/Hz with a loop bandwidth of 1 to 5 MHz.
关键词： digitally controlled oscillator (DCO),least-mean-square (LMS),digital phase-locked-loop (PLL),time-to-digital converter (TDC),successive-approximation-register analog-to-digital converter (SAR-ADC),frequency synthesizer,CMOS,sub-picosecond resolution
更新于2025-09-23 15:19:57
-
CMOS-coupled NaI scintillation detector for gamma decay measurements
摘要： We report an all-solid-state gamma-ray scintillation detector comprised of a NaI(Tl) crystal and a scientific-grade CMOS camera. After calibration, this detector exhibits excellent linearity over more than three decades of activity levels ranging from 10 mCi to 400 nCi. Because the detector is not counting pulses, dead-time correction is not required. Compared to systems that use a photomultiplier tube, this detector has similar sensitivity and noise characteristics on short time scales. On longer time scales, we measure drifts of a few percent over several days, which can be accommodated through regular calibration. Using this detector, we observe that when high activity sources are brought into close proximity to the NaI crystal, several minutes are required for the measured signal to achieve a steady state.
关键词： gamma-ray scintillation detector,dead-time correction,photomultiplier tube,NaI(Tl) crystal,CMOS camera
更新于2025-09-23 15:19:57
-
[IEEE 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) - San Diego, CA, USA (2018.10.15-2018.10.17)] 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) - A DC-60 GHz I/Q Modulator in 45 nm SOI CMOS for Ultra-Wideband 5G Radios
摘要： This paper presents a DC-60 GHz I/Q modulator/transmitter chip in 45 nm SOI CMOS, that can serve as a critical building block for next generation multi-standard and high-capacity wireless backhaul links. The modulator consists of a wideband quadrature signal generator, wideband buffers and two current-combined DC-100 GHz low-noise double-balanced mixers driven in quadrature. The 1.4 mm2 modulator chip achieves 60 dB of dynamic range in a 1 GHz bandwidth, with an OP 1dB of -10 to -12 dBm, thus enabling spectrally-ef?cient high-order modulation schemes such as 256-QAM. The I/Q modulator achieves 200 Gbps in 16-QAM (50 Gbaud/s), while consuming 200 mW, resulting in record 1 pJ/bit modulation ef?ciency. In addition to backhaul links, the modulator is an attractive and cost-effective alternative to short-range optical links for data center interconnects (DCI) applications.
关键词： QAM,CMOS,transmitter,5G,mm-wave,radio,Modulator
更新于2025-09-23 15:19:57
-
Silicon-based detectors at the HL-LHC
摘要： This document discusses the silicon-based detectors planned for the High Luminosity LHC. The special aspects to cope with the new environment and its challenges, e.g. very high radiation levels and very high instantaneous luminosity thus high pile-up, high occupancy and high data rates, are addressed. The different design choices of the detectors are put into perspective. Exciting topics like trackers, high granularity silicon-based calorimetry with novel 8 inch processing, fast timing and new triggers are described.
关键词： Ultrafast timing,HV-CMOS,HL-LHC,Monolithic CMOS,Calorimeter,Tracker,LGAD,Track trigger,Silicon sensors,3D sensors
更新于2025-09-19 17:15:36
-
[IEEE 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - Erlagol (Altai Republic), Russia (2018.6.29-2018.7.3)] 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - An Interface Model of the Interconnection Between Integrated Circuit Chip Die and Printed Circuit Board
摘要： This work represents results obtained during research of high frequency IC packaging. The interface between IC die and PCB is described and its inner structure is developed: contact pads on IC die, bondwires and chip outputs. As an example of method developed the interface effects into device development and characteristics are shown for the LNA module as a part of the GPS receiver test chip.
关键词： LNA,Low noise amplifier,GPS,CMOS,chip packaging,Noise Figure
更新于2025-09-19 17:15:36
-
[IEEE 2018 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2018.12.1-2018.12.5)] 2018 IEEE International Electron Devices Meeting (IEDM) - A CMOS Proximity Capacitance Image Sensor with <tex>$16\mu \mathrm{m}$</tex> Pixel Pitch, 0.1aF Detection Accuracy and 60 Frames Per Second
摘要： A 16μm pitch 256×256 frames per second CMOS proximity capacitance image sensor fabricated by a 0.18μm CMOS process technology is presented. By the introduction of noise canceling operation, both fixed pattern noise (FPN) and kTC noise are significantly reduced, resulting in the 0.1aF (10-19F) detection accuracy. Proximity capacitance imaging results using the developed sensor are also demonstrated.
关键词： detection accuracy,CMOS,noise canceling,kTC noise,60 fps,proximity capacitance image sensor,0.1aF,FPN
更新于2025-09-19 17:15:36