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- 摘要
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- 实验方案
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Composition and Strain Evolution of Undoped Si <sub/>0.8</sub> Ge <sub/>0.2</sub> Layers Submitted to UV-Nanosecond Laser Annealing
摘要： Ultraviolet Nanosecond Laser Annealing (UV-NLA, XeCl laser, 308 nm, 145 ns) was performed on 30 nm-thick Si0.8Ge0.2 epitaxial layers. The various regimes encountered after single pulse UV-NLA are described and discussed, including submelt, SiGe layer partial and total melt, as well as melt beyond the SiGe epi-layer. Energy densities around 2.00 J/cm2 and above led to the formation of pseudomorphic layers with strong Ge redistribution. Starting from uniform Si0.8Ge0.2 layers, Ge segregation towards the surface resulted in the formation of a Ge-rich surface layer with up to 55% Ge for 2.00 J/cm2. Such pseudomorphic SiGe layers with graded composition and a Ge-rich surface layer may find some promising applications such as contact resistance lowering in doped layers.
关键词： SiGe,pseudomorphic,contact resistance,Ge redistribution,Ultraviolet Nanosecond Laser Annealing
更新于2025-11-14 14:32:36
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Scaling of High-Performance Organic Permeable Base Transistors
摘要： Organic permeable-base transistors (OPBTs) show potential for high-speed, flexible electronics. Scaling laws of OPBTs are discussed and it is shown that OPBT performance can be increased by reducing their effective device area. Comparing the performance of optimized OPBTs with state-of-the-art organic field-effect transistors (OFETs), it is shown that OPBTs have a higher potential for an increased transit frequency. Not only do OPBTs reach higher transconductance values without the need for sophisticated structuring techniques, but they are also less sensitive to parasitic contact resistances. With the help of a 2D numerical model, the reduced contact resistances of OPBTs are explained by a homogeneous injection of current across the entire emitter electrode, compared to injection in a small area along the edge of the source of OFETs.
关键词： scaling,injection,organic permeable-base transistors,contact resistance,transit frequency
更新于2025-10-22 19:50:37
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Contact Engineering for Dual-Gate MoS <sub/>2</sub> Transistors Using O <sub/>2</sub> Plasma Exposure
摘要： The benefits of O2 plasma exposure at the contact regions of dual-gate MoS2 transistors prior to metal deposition for high performance electron contacts is studied and evaluated. Comparisons between devices with and without the exposure demonstrate significant improvements due to the formation of a high-quality contact interface with low electron Schottky barrier (~0.1 eV). Topographical and interfacial characterization are used to study the contact formation on MoS2 from the initial exfoliated surface through the photolithography process and Ti deposition. Fermi level pinning near the conduction band is shown to take place after photoresist development leaves residue on the MoS2 surface. After O2 plasma exposure and subsequent Ti deposition, Ti scavenges oxygen from MoOx and forms TiOx. Electrical characterization results indicate that photoresist residue and other contaminants present after development can significantly impact electrical performance. Without O2 plasma exposure at the contacts, output characteristics of MoS2 FETs demonstrate non-linear, Schottky-like contact behavior compared to the linearity observed for contacts with exposure. O2 plasma allows for the removal of the residue present at the surface of MoS2 without the use of a high temperature anneal. A low conduction band offset and superior carrier injection are engineered by employing the reactive metal Ti as the contact to deliberately form TiO2. Dual-gate MoS2 transistors with O2 plasma exposure at the contacts demonstrate linear output characteristics, lower contact resistance (~20× reduction), and higher field effect mobility (~15× increase) compared to those without the treatment. In addition, these results indicate that device fabrication process induced effects cannot be ignored during the formation of contacts on MoS2 and other 2D materials.
关键词： TiO2,MoS2,contact resistance,O2 plasma,photoresist residue,MOSFETs,contacts
更新于2025-09-23 15:22:29
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Wafer Scale Graphene Field Effect Transistors on Thin Thermal Oxide
摘要： In this study, we present the feasibility to fabricate back-gated graphene field-effect transistors (GFETs) on 10 nm thermal SiO2 substrate. Here, we compare the mobility of graphene devices at different locations of the transferred CVD graphene. We observed that there is a n-type doping of the graphene devices with Dirac points within ± 0.5 V from an ideal value of 0 V. The downscaling of the back-gate dielectric thickness reduces the operating voltage range, commonly required for low power electronics, and the devices are stable during operation in air under ambient conditions. The extracted contact resistance is comparable to the earlier reports found in literature and this provides a feasibility to fabricate low power futuristic graphene based nanoelectronics.
关键词： CVD graphene,n-type doping,thermal SiO2,mobility,Dirac points,low power electronics,field-effect transistors,graphene,contact resistance
更新于2025-09-23 15:21:01
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Solution-Based Property Tuning of Black Phosphorus
摘要： The air instability of black phosphorus (BP) severely hinders the development of its electronic and optoelectronic applications. Although a lot of effort has been made to passivate it against degradation in ambient conditions, approaches to further manipulate the properties of passivated BP are still very limited. Herein, we report a simple and low-cost chemical method that can achieve BP passivation and property tailoring simultaneously. The method is conducted by immersing a BP sample in the solution containing both 2,2,6,6-tetramethylpiperidinyl-N-oxyl (TEMPO) and triphenylcarbenium tetrafluorobor in a mixture of water and acetone (v/v = 1:1). After the treatment, the BP sample is functionalized with TEMPO, which not only efficiently passivates BP but also p-dopes BP to a degenerated density level of 1013 cm?2. The performance of the BP field effect transistor is improved after functionalization with a high Ion/Ioff ratio of 106 and carrier mobility of 881.5 cm2/(V·s). The functionalization-induced doping also significantly reduces the contact resistance between BP and the Cr/Au electrode to 0.97 kΩ·μm. Additionally, we observe a great reduction of BP electrical and optical anisotropies after functionalization. This chemical functionalization method provides a viable route to simultaneously passivate and tune the properties of BP.
关键词： p-type doping,anisotropy,functionalization,black phosphorus,contact resistance
更新于2025-09-23 15:21:01
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Ti/Au/Al/Ni/Au low contact resistance and sharp edge acuity for highly scalable AlGaN/GaN HEMTs
摘要： In this letter, we have reported a novel metal scheme Ti/Au/Al/Ni/Au for ohmic contact on AlGaN/GaN high electron mobility transistors (HEMTs). The reported metal scheme is observed to show minimum metal out-diffusion and sharp edge acuity at high temperature annealing, which facilitates aggressive scaling of source drain separation (LSD). We have demonstrated LSD as low as 300 nm with gate length (Lg) of 100 nm for this metal stack. We observed improvement in ON-Resistance (RON) from 3 ?.mm to 1.25 ?.mm, transconductance (gm) from 276 mS/mm to 365 mS/mm, saturation drain current (IDS,sat) from 906 mA/mm to 1230 mA/mm and unity current gain frequency (fT) from 70 GHz to 93 GHz by scaling LSD from 3 μm to 300 nm. The gate length for all devices were 100 nm.
关键词： Edge acuity,HEMT,smooth surface,current gain cut-off frequency,ohmic contact resistance,GaN
更新于2025-09-23 15:21:01
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Lateral transport in silicon solar cells
摘要： We investigate lateral charge carrier transport in crystalline silicon solar cells. Under typical operation illumination of high-efficiency solar cells, a significant population of electrons and holes exist in the silicon wafer, leading to a non-negligible sheet conductance for both carrier types. To investigate the contribution of these sheet conductances to lateral transport in solar cells, we develop a model that calculates the effective series resistance of two sheet resistances coupled via a contact resistance. In solar cells, the upper sheet resistance describes the highly conductive region like a diffusion or a transparent conductive oxide, whereas the lower sheet resistance describes the silicon absorber. We find that the coupling contact resistance needs to be low to benefit from the lateral current flow in the silicon absorber. We show experimentally for silicon heterojunction solar cells that the silicon absorber supports lateral minority charge carrier transport for well-passivated devices. Another finding is that there is no principle advantage for coupling of the two sheet resistances for rear-junction or front-junction solar cells, as the pn-junction (for front-junction solar cells) does not prevent coupling. We suggest that for n-type silicon heterojunction solar cells, the observed advantage of the rear-junction over the front-junction architecture is due to practically lower contact resistance and higher mobility of electrons vs holes. We also confirm experimentally the importance of a low contact resistivity between the highly conductive region and the silicon absorber for effective coupling and present an innovative technique to extract contact resistance from comparing Suns-VOC and current–voltage measurements.
关键词： sheet conductance,silicon heterojunction,lateral transport,contact resistance,silicon solar cells
更新于2025-09-23 15:19:57
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Organic thin-film transistors with flame-annealed contacts
摘要： Reducing contact resistance is critical to developing high-performance organic field-effect transistors (OFETs) since it impacts both the device mobility and switching speed. Charge injection and collection has been optimized by applying chemical treatments to the contacts, such as self-assembled monolayers, oxide interlayers, or dopants. Here, we tested how flame annealing the surface of the electrodes impacts the interface and bulk components of the contact resistance, as well as the overall device performance. A butane micro torch was used to flash-anneal the gold electrodes, which allowed gold grains to crystallize into larger domains. We found that, along with the grain size, the surface roughness of the contacts was also increased. Self-assembled monolayer treatment created a lower work function shift on a flame annealed electrode than when deposited on an untreated surface, due to the greater surface roughness. This resulted in a larger interface contact resistance. However, flame annealing also produced an order of magnitude reduction in the density of trap states in the semiconductor layer, which reduced the bulk contact resistance and channel resistance. These competing effects yielded OFETs with similar performance as untreated devices.
关键词： charge injection,contact resistance,organic field-effect transistor
更新于2025-09-23 15:19:57
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Eliminating light- and elevated temperature-induced degradation in P-type PERC solar cells by a two-step thermal process
摘要： Light- and elevated temperature-induced degradation (LeTID) can have a severe impact on the carrier lifetime of silicon substrates used in solar cell production and thus remains a crucial challenge for manufacturers. In this work, we introduce a two-step annealing process to mitigate LeTID in multi-crystalline silicon (mc-Si) passivated emitter and rear cell (PERC) solar cells. We demonstrate that the first annealing step (450°C) with a slow belt speed (0.5 m/min) plays a primary role in mitigating LeTID in the cells, but also results in an increase in contact resistance. The application of a second annealing step at a similar temperature (400–500°C) with a faster belt speed (1.4 m/min) recovers the contact resistance whilst maintaining the stability of the cell. Applying this approach to the p-type mc-Si PERC solar cells resulted in a reduction of efficiency loss during light soaking from ~6%rel (control) to ~1%rel (treated sample). This finding is significant for p-type mc-Si solar cell manufacturers, as the process can be applied to finished cells using a standard belt firing furnace to stabilise cell efficiency for long term operation in the field.
关键词： Light- and elevated temperature-induced degradation (LeTID),Multi-crystalline silicon (mc-Si),Two-step thermal process,Contact resistance,Eliminating
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Analysis of the Value Proposition of High-efficiency, Multijunction Solar Modules for Residential Rooftop Installations
摘要： We report for the ?rst time on the impact of a printed indium tin oxide (ITO) layer inserted between a printed silver conductor and solution processed zinc oxide (ZnO) leading to an optimized semiconductor/contact scheme for full print integration. Introducing the ITO interlayer, the contact resistance is reduced by two orders of magnitude. Nanoparticle thin-?lm transistors (TFTs) in this Ag/ITO contact con?guration show improved saturation mobility of 0.53 cm V s with respect to 0.08 cm V s without ITO interlayer. The contact improvement can be attributed to either an increased charge carrier concentration or a reduction of band offsets at the ZnO/electrode interface.
关键词： indium–tin–oxide,zinc oxide (ZnO),thin-?lm transistors (TFTs),Contact resistance
更新于2025-09-23 15:19:57