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- 2018
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- Electrical Engineering and Automation
- Tianjin University
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[IEEE 2019 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC) - Munich, Germany (2019.6.23-2019.6.27)] 2019 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC) - Gravitational Physics with Atomic Quantum Sensors
摘要： This paper proposes a practical solution of high-frequency-link dc transformer based on switched capacitor (SCDCT) for medium-voltage dc (MVDC) power distribution application. Compared to the traditional dc transformer scheme, the proposed SCDCT can disconnect from MVDC distribution grid effectively as a dc breaker when a short fault occurs in the distribution, can enhance power transfer capacity, and always ensures high-frequency-link voltage match to improve current impact and ef?ciency performances, and the redundancy design can be achieved when some submodules fail to improve the reliability. In the paper, the topology, voltage and power characterization, control strategy, startup, and fault solution of SCDCT are presented and analyzed comprehensively. At last, an SCDCT prototype is built and the experimental results verify the correctness and effectively of the proposed solution.
关键词： switched capacitor,dc transformer,dc–dc converter,solid-state transformer (SST),DC distribution,high-frequency-link,dual active bridge (DAB)
更新于2025-09-19 17:13:59
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Performance Analysis of Single-Stage LED Buck Driver Topologies for Low-Voltage DC Distribution Systems
摘要： The demand for lean protein is the main reason for raising domesticated birds in poultry farms for the purpose of farming meat or eggs for food. In these poultry farms, artificial lighting system is an essential factor for the success of the commercial production of egg layers and broilers. Lighting loads connected to the existing AC system requires DC power. Nearly 25% of the total power consumed in India is by lighting loads. Therefore, low-voltage DC distribution system is the new requirement of electrical network to improve energy conservation. In this paper, an energy efficient single-stage LED driver topology is proposed as a better alternative to fluorescent lights used in poultry farms. The proposed topology is a phase-shifted buck converter with reduced size of passive components. The converter is mathematically modelled and designed for a power of 24 W LED lights. An experimental prototype is developed for the proposed converter and the results are validated in terms of cost, energy savings, and energy efficiency with various other LED driver topologies like conventional buck converter and interleaved buck converter. Further to justify the outcome of the proposed LED driver, a case study is also done for poultry farms.
关键词： energy savings,Phase-Shifted Buck Converter (PSBC),dimming control,digital controller,LED driver
更新于2025-09-19 17:13:59
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Fixed frequency integral sliding-mode current-controlled MPPT boost converter for two-stage PV generation system
摘要： In two-stage grid-integrated photovoltaic (PV) system, usually a DC–DC converter is employed between the PV modules and the inverter. The dynamic interactions between the DC–DC converter, inverter, and the maximum power point tracking (MPPT) controller may affect the system performances. This study gives an integral procedure to design a stable sliding-mode controller (SMC) based on fixed frequency equivalent control approach to improve the transient response of PV system and to track the reference voltage supplied by the voltage-oriented MPPT controller in the presence of environmental and load perturbations and converter output sinusoidal perturbations imposed by the second harmonic of the grid frequency. The controller consists of fast current tracking inner current loop based on SMC law whose sliding surface is defined by the input capacitor and inductor current and outer PI controller maintains required PV voltage regulation. The superiority of the controller is validated at different operating conditions through PSIM software and its performance is compared with variable frequency hysteresis-based SMC. To check the static and transient performances of the system, various experiments are conducted. The results obtained show very fast transient response in settling time and alleviation of chattering magnitude at various operating conditions.
关键词： maximum power point tracking (MPPT),DC–DC converter,transient response,PSIM software,settling time,chattering magnitude,voltage regulation,photovoltaic (PV) system,fixed frequency,sliding-mode controller (SMC),hysteresis-based SMC
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE) - Edmonton, AB, Canada (2019.5.5-2019.5.8)] 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE) - A Novel Control Methodology for Stand-Alone Photovoltaic Systems Utilizing Maximum Power Point Tracking
摘要： This paper introduces an innovative Maximum Power Point Tracking (MPPT) technique to extract maximum available power from a Photovoltaic (PV) system irrespective of temperature, solar irradiation and load anomalies. A single-stage DC-DC buck converter that extracts maximum power from the connected PV module and controls the output battery state of charge (SoC) is a key component in achieving this target. The introduced circuit consists of three subsystems: a PV module, a Buck converter and an MPPT plus voltage regulation controller. MPPT is achieved via a novel methodology, not only applies to maximum energy extraction of the PV module but also combined with a feedback optimization of the battery charging and discharging modes. The developed system is geared towards Internet of Things (IoT) based wireless sensor nodes (WSN). In the proposed solution, power harvested from the PV module is combined with the battery power; to guarantee that the connected load receives a full supply of power. To maximize the energy conversion a converter controlled MPPT algorithm - Perturb and Observe (P&O) which considers the non-linear output of the PV is utilized with the aid of the buck converter. The validity of the introduced system is tested using the simulation model in PSIM and the results are presented and discussed.
关键词： Photovoltaic System,MPPT,Buck Converter,Perturb and Observe
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 13th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG) - Sonderborg, Denmark (2019.4.23-2019.4.25)] 2019 IEEE 13th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG) - An Overview of Photovoltaic Microinverters: Topology, Efficiency, and Reliability
摘要： This paper presents an overview of microinverters used in photovoltaic (PV) applications. Conventional PV string inverters cannot effectively track the optimum maximum power point (MPP) of the PV string due to the series con?guration (especially, under partial shading conditions). In order to tackle this problem, microinverters make each PV panel operate at its own MPP so that the overall ef?ciency can be improved. In this paper, a detailed analysis is carried out among commercially-available microinverters in terms of topological structure and operational principle. Moreover, the latest products on the microinverter market and future trends of the microinverters are discussed in terms of ef?ciency and reliability.
关键词： microinverter,?yback converter,DC-DC inverter,PV application,DC-AC inverter
更新于2025-09-19 17:13:59
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Sliding mode controllera??based ea??bike charging station for photovoltaic applications
摘要： PV-based and wired type of the electrical bicycles (e-bike) battery charging stations widely is spreading because of the resonant network limitations and low efficiency of the wireless mode for these stations. The generated voltage of many of the PV panels such as JIYANGYIN HR-200 W-24 V at the maximum power point is around 36VDC. So, a step-down converter with a PID controller for Maximum Power Point Tracking (MPPT) of the PV panels is considered between PV panels and boost converter in order to decrease this voltage and enhance the current values for the load side. A sliding mode controller (SMC) equipped with a non-isolated DC-DC boost converter with reduced voltage stresses on the power switch is presented. The step-up converter increases the voltage to the utility level of the e-bike with around 360 Wh amount of energy. The main concerns about the converters are the efficiency, voltage, and current stresses, number of active or passive components in the converter topology and simplicity. In comparison with a conventional step-up converter, the selected converter has a lower dynamic loss in the input inductor that can give a proper efficiency by considering its higher voltage gain. The average state-space model for the SMC is used and the main advantage of the controller is its independency to the inductor current or the amount of the load. The proposed SMC is compared with PID and Fuzzy Logic Controller (FLC) methods and based on the results, the robustness, overshoot, and damping factor of the controller are at an acceptable and better level. All mathematical, simulation and comparison results are presented. A 720 Wh circuit has been implemented for charging all types of the Li-Ion or Li-Polymer batteries with 36VDC and 10 Ah specifications.
关键词： DC-DC step-up converter,electrical charging station (ECS),PV panels,sliding mode controller (SMC),E-bike
更新于2025-09-19 17:13:59
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Wideband Hybrid Envelope Tracking Modulator With Hysteretic-Controlled Three-Level Switching Converter and Slew-Rate Enhanced Linear Amplifier
摘要： A wideband hybrid Envelope tracking (ET) modulator utilizing a hysteretic-controlled three-level switching converter (3L-SWC) and a slew-rate enhanced linear ampli?er (LA) are presented. In addition to smaller ripple and lower losses of 3L-SWCs, employing the proposed hysteresis control results in a higher speed loop and wider bandwidth converter, enabling over 80 MHz of switching frequency. A concurrent sensor circuit monitors and regulates the ?ying capacitor voltage VCF and eliminates the conventionally required calibration loop to control it. The hysteretic-controlled 3L-SWC provides a high percentage of power ampli?er (PA) supply load current with lower ripple, reducing the LA high-frequency current and ripple cancellation current, improving the overall system ef?ciency. A slew-rate enhancement (SRE) circuit is employed in the LA, resulting in slew rate of over 307 V/μs and bandwidth of over 275 MHz for the LA. The SRE circuit provides a parallel auxiliary current path directly to the gate of the class-AB output stage transistors, speeding-up the charging or discharging of output without modifying the operating point of the remaining LA, while maintaining the quiescent current of the class-AB stage. The supply modulator is fabricated in a 65-nm CMOS process. The measurement results show the tracking of long-term evolution (LTE)-40-MHz envelope with 93% peak ef?ciency at 1-W output power, while the SRE is disabled. Enabling the SRE, it can track LTE-80-MHz envelope with peak ef?ciency of 91%.
关键词： long-term evolution (LTE),LTE-advanced,hysteresis control,Envelope tracking (ET),supply modulator,power ampli?er (PA),three-level switching converter (3L-SWC),slew-rate enhancement (SRE),hybrid
更新于2025-09-19 17:13:59
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[IEEE 2019 International Conference on Information Science and Communications Technologies (ICISCT) - Tashkent, Uzbekistan (2019.11.4-2019.11.6)] 2019 International Conference on Information Science and Communications Technologies (ICISCT) - Evaluation of Low Cost Laser Scanner for Rapid Registration of Point Clouds with Limited Information on Rotation and Relative Location
摘要： This paper presents a 0.55 V, 7 bit, 160 MS/s pipeline ADC using dynamic amplifiers. In this ADC, high-speed open-loop dynamic amplifiers with a common-mode detection technique are used as residue amplifiers to increase the ADC's speed, to enhance the robustness against supply voltage scaling, and to realize clock-scalable power consumption. To mitigate the absolute gain constraint of the residue amplifiers in a pipeline ADC, the interpolated pipeline architecture is employed to shift the gain requirement from absolute to relative accuracy. To show the new requirements of the residue amplifiers, the effects of gain mismatch and nonlinearity of the dynamic amplifiers are analyzed. The 7 bit prototype ADC fabricated in 90 nm CMOS demonstrates an ENOB of 6.0 bits at a conversion rate of 160 MS/s with an input close to the Nyquist frequency. At this conversion rate, it consumes 2.43 mW from a 0.55 V supply. The resulting FoM of the ADC is 240 fJ/conversion-step.
关键词： ultra-low-voltage,dynamic amplifier,dual-residue,clock-scalable,charge-steering,capacitive interpolation,interpolated pipeline,Analog-to-digital converter
更新于2025-09-19 17:13:59
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[IEEE 2019 PhotonIcs & Electromagnetics Research Symposium - Spring (PIERS-Spring) - Rome, Italy (2019.6.17-2019.6.20)] 2019 PhotonIcs & Electromagnetics Research Symposium - Spring (PIERS-Spring) - Technological Features of Graphene-based RF NEMS Capacitive Switches on a Semi-insulating Substrate
摘要： This paper presents an all-digital phase-locked loop (AD-PLL) using a voltage-domain digitization realized by an analog-to-digital converter (ADC) instead of adopting a traditional time-to-digital converter (TDC) which usually suffers from a tradeoff in resolution and power consumption. It consists of an 18 bit class-C digitally controlled oscillator (DCO), a 4 bit comparator, a digital loop filter (DLF), and a frequency-locked loop (FLL). Implemented in 65 nm CMOS technology, the proposed PLL reaches an in-band phase noise of ?112 dBc/Hz and an RMS jitter of 380 fs at a carrier frequency of 2.2 GHz. A figure of merit (FoM) of ?242 dB was achieved with a power consumption of only 4.2 mW.
关键词： sub-sampling,analog-to-digital converter (ADC),voltage-domain,All-digital phase-locked loop (AD-PLL),frequency synthesizer,CMOS,low-power
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 19th International Conference on Nanotechnology (IEEE-NANO) - Macao (2019.7.22-2019.7.26)] 2019 IEEE 19th International Conference on Nanotechnology (IEEE-NANO) - Injection Lock Frequency Divider with Class-C Coupled VCO for Nanoelectronics Harmonic Demodulator of Fluxgate Sensing
摘要： This paper presents a 9-bit 1.8 GS/s pipelined analog-to-digital converter (ADC) using open-loop amplifiers. In this ADC, open-loop amplifiers are used as residue amplifiers to increase the sampling rate of the ADC with relatively low power consumption. A linearization technique is proposed to suppress the SNDR decrease caused by the nonlinearity of open-loop amplifiers. The attenuation in the capacitor digital-to-analog converter (CDAC) is utilized to calibrate the gain error of the pipelined stages. In addition, top-plate sampling is proposed to further enhance the power efficiency of the residue amplifiers. With these techniques, the ADC achieves a high sampling rate and high power efficiency. A prototype of the ADC is fabricated in 65 nm CMOS technology. An SNDR of 47 dB and a FoM of 134 fJ/conversion-step is achieved at a sampling rate of 1.8 GS/s with 900 MHz input, while consuming 44 mW from a 1.2 V supply.
关键词： double sampling,open-loop amplifier,linearity enhancement,Analog-to-digital converter,pipelined ADC
更新于2025-09-19 17:13:59