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Model of GaSb-InAs p-i-n Gate All Around (GAA) BioTunnel FET (BTFET)
摘要: The paper investigates the role of hetero-Junction (HJ) p-i-n Gate All Around GAA Tunnel FET architecture for biosensing applications. The device offers better sensitivity and has been modeled in terms of various parameters such as surface potential, threshold voltage and drain current. Analytical modeling scheme relates to the exact resultant solution of two-dimensional Poisson equation. The shift in the threshold voltage has been considered as the sensing parameter to detect the sensitivity when the biomolecules are immobilized in the cavity region.
关键词: Gate all around tunnel FET (GAA-TFET),Model,Bio-Sensor,Hetero Junction (HJ),Dielectric Modulation
更新于2025-09-04 15:30:14
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Total-Ionizing-Dose Response of MoS2 Transistors with ZrO2 and h-BN Gate Dielectrics
摘要: The total-ionizing-dose response of few-layer MoS2 transistors with ZrO2 or h-BN gate dielectrics is investigated under various bias conditions. Defects in MoS2 and surrounding dielectric layers significantly affect radiation-induced trapping. For devices with ZrO2 dielectrics, much larger negative Vth shifts and peak transconductance degradation are observed for irradiation under negative and ground bias than under positive bias. h-BN devices exhibit positive threshold voltage shifts under negative-bias irradiation. For both ZrO2 and h-BN passivated devices, the peak transconductance degradation results from charge trapping at the surface of the MoS2 or in nearby oxides. Changes in defect energy distributions of MoS2 FETs during X-ray irradiation are characterized via temperature-dependent low-frequency noise measurements. Density functional theory calculations are performed to provide insight into the pertinent defects.
关键词: DFT,MoS2 FET,low frequency noise,ZrO2,h-BN,2 dimension,X-ray
更新于2025-09-04 15:30:14
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[IEEE 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Atlanta, GA, USA (2018.10.31-2018.11.2)] 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Thermal Characterization and Design for a High Density GaN-Based Power Stage
摘要: This paper proposes a methodology for extracting the thermal equivalent circuit of a high density GaN-based power stage, using a 48 V to 12 V GaN-based synchronous buck converter as the test platform. The test setup calculates the junction temperatures by measuring Rds,on for both FETs in the half bridge, while current sources produce power losses in each device and the output filter inductor. Independent control of the two gate voltages allows for either symmetric or asymmetric distribution of power loss between the two FETs, and comparison of these results are used to calculate the coupled and uncoupled thermal resistances between them. The thermal interaction with the filter inductor is similarly modeled. The baseline thermal design with a bare PCB and no heatsink was characterized, as well as a proposed thermal solution consisting of a heatsink, gap pad, gap filler, and a plastic shim. Each configuration was tested with three air flow conditions, and the resulting thermal model was used to estimate the maximum current capability without exceeding 100 °C on either FET. The proposed thermal solution improves the maximum current-handling capability by over 60% compared with the baseline design.
关键词: thermal characterization,eGaN FET,thermal design,HEMT,HFET,heatsink,junction temperature,GaN
更新于2025-09-04 15:30:14
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[IEEE 2018 IEEE Energy Conversion Congress and Exposition (ECCE) - Portland, OR, USA (2018.9.23-2018.9.27)] 2018 IEEE Energy Conversion Congress and Exposition (ECCE) - Stretching in Time of GaN Active Gate Driving Profiles to Adapt to Changing Load Current
摘要: Active gate driving, where the gate signal is actively profiled, has been shown to reduce EMI, overshoot, and switching loss, in silicon power converters. Recently, much faster gate drivers with the ability to profile at a 100 ps resolution have been reported, which has opened up the possibility of actively driving emerging wide-bandgap devices. This could allow Gallium Nitride (GaN) and Silicon Carbide (SiC) FETs to be switched faster than is currently possible, as unwanted switching features such as current ringing at turn-on could be eliminated. However, these drivers have previously only been demonstrated with pre-programmed gate profiles that have been optimized at certain operating conditions, whereas converters typically operate in a range of conditions. In this paper, some limitations of using fixed gate profiles on GaN FETs are reported for the first time, and a new method of profile adaptation is demonstrated. First, the gate profiles in a 400 V GaN bridge-leg are optimized to minimize current ringing at turn-on for a given load current. Then, the load current is varied, showing that the gate signal profile remains close to optimal for ±20% changes in current. Also, over a larger range of at least ±35%, the profiled waveform performs better than a non-profiled gate waveform. It is then demonstrated that by slightly reducing the driver’s internal clock frequency with increasing load current, the profile is re-optimized for new load currents. It is concluded that driver clock frequency adaptation may be a means of adapting gate profiles to load current variation and possibly also to temperature variation.
关键词: Active Gate Driving,Arbitrary Waveform Gate Driver,GaN Gate Driver,Dynamic Output Resistance Gate Driver,GaN FET
更新于2025-09-04 15:30:14