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Reference Module in Materials Science and Materials Engineering || III-V and Group-IV-Based Ferromagnetic Semiconductors for Spintronics
摘要： From the first development of the transistor, the rapid growth of solid-state electronic circuits has been quite impressive. Innovations of semiconductor (SC) processing technologies have helped keep the pace of developing smaller electronic devices with higher performance. Operations of most electronic devices rely on the ability to control the flow of charges. However, when electronic devices reach the scale of 10 nm or even smaller, two big problems appear. First, many kinds of fluctuation make it difficult to control the flow of electron charges. For example, when the channel length of field effect transistors (FETs) reaches several nanometers, the transport of electrons cannot be described by the conventional diffusion equation. In nanoscale devices, even fluctuation of positions of doped atoms strongly affects the movement of electrons, making it difficult to predict and control the output current. This results in large fluctuation of device parameters. The second problem is the leak off-current that results in the large idling energy dissipation. When the channel length reaches sub-10 nm, the leak off-current appears due to the quantum tunneling effect. As the device size becomes smaller, a larger number of devices working at higher speed are integrated. Thus, larger idling energy is consumed. To overcome these problems, many emerging technologies are being explored and developed. One of the prospective technologies, called 'spintronics,' may help us to find solutions or a totally new framework of electronics.
关键词： Group-IV semiconductors,ferromagnetic semiconductors,Mn-doped,Fe-doped,electrical control of ferromagnetism,III-V semiconductors,tunneling magnetoresistance,spintronics
更新于2025-09-10 09:29:36
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Effects of barrier energy offset and gradient in extended wavelength infrared detectors
摘要： The extended wavelength infrared photodetectors are new class of III-V semiconductor heterojunction-based photodetectors that can detect incoming radiation with an energy significantly smaller than the minimum energy gap (Δ) at the heterojunction interface. Architecture of these photodetectors include a barrier-emitter-barrier epilayers sandwiched between highly doped ohmic top and bottom contact layers. An energy offset (????) between the barriers is necessary for the extended wavelength photodetection. In this work, we study the performance of extended wavelength infrared photodetectors with varying ???? and gradient of the potential barrier. Results indicate that the extended wavelength threshold varied slightly with varying both the gradient and offset. Spectral responsivity, however, increased with the increasing offset and decreased with increasing gradient.
关键词： Extended wavelength infrared photodetectors,III-V semiconductors,GaAs/AlGaAs heterostructures
更新于2025-09-09 09:28:46
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Reactivity studies and structural properties of Al on compound semiconductor surfaces
摘要： The authors studied the structural properties of Al on III-V semiconductors (InAs, GaAs, and InGaAs) with the aim of creating smooth and abrupt interfaces. Growth conditions, such as the residual As content and the presence of intermediate layers, affect the structural properties of the Al and the underlying semiconductor. The authors find that an ultrathin layer of AlAs on (001) InAs drastically reduces the interface reaction and improves the epitaxial growth of Al. No such layer is necessary for interface reaction mitigation for Al deposited onto InGaAs or GaAs. The crystal orientation of Al planes grown on (001) InAs is [110], but is [111] on InGaAs or GaAs. The authors discuss the significance of the results for realization of structures for proximity superconductivity.
关键词： GaAs,InAs,Al,epitaxial growth,proximity superconductivity,InGaAs,interface reaction,III-V semiconductors
更新于2025-09-04 15:30:14
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Insight of surface treatments for CMOS compatibility of InAs nanowires
摘要： A CMOS compatible process is presented in order to grow self-catalyzed InAs nanowires on silicon by molecular beam epitaxy. The crucial step of this process is a new in-situ surface preparation under hydrogen (gas or plasma) during the substrate degassing combined with an in-situ arsenic annealing prior to growth. Morphological and structural characterizations of the InAs nanowires are presented and growth mechanisms are discussed in detail. The major influence of surface termination is exposed both experimentally and theoretically using statistics on ensemble of nanowires and density functional theory (DFT) calculations. The differences observed between Molecular Beam Epitaxy (MBE) and Metal Organic Vapor Phase Epitaxy (MOVPE) growth of InAs nanowires can be explained by these different surfaces terminations. The transition between a vapor solid (VS) and a vapor liquid solid (VLS) growth mechanism is presented. Optimized growth conditions lead to very high aspect ratio nanowires (up to 50 nm in diameter and 3 micron in length) without passing the 410 °C thermal limit, which makes the whole process CMOS compatible. Overall, our results suggest a new method for surface preparation and a possible tuning of the growth mechanism using different surface terminations.
关键词： nanowires,growth modeling,self-catalyzed growth,hydrogen preparation,density functional theory (DFT) modeling,III-V semiconductors on silicon,InAs
更新于2025-09-04 15:30:14