- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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Error correction for short-range optical interconnect using COTS transceivers
摘要： Nowadays, quantities of commercial off-the-shelf (COTS) optical transceivers are widely equipped in both exiting and abuilding data centers. As data centers are becoming larger and containing more servers, the method to ensure longer and steady transmission with COTS optical transceivers becomes one of the key issues. Meanwhile, variations in the manufacturing of COTS optical transceivers bring in fluctuation of packet error rate (PER) in communication. In this paper, we present an application layer adaptive forward error correction (AL-AFEC) coding scheme for COTS optical transceivers in optical interconnect to solve the problems mentioned above and test its performance in a 10 Gbps Ethernet (10GbE) link using 10GBASE-SR SFP+ modules. Experimental results show that the proposed scheme enables longer transmission distance and the instability introduced by manufactural variations is well settled. Since our scheme requires no extra hardware on optical transceivers, it is a considerable low-cost alternative to improve system reliability and achieve longer transmission distance for COTS optical transceivers.
关键词： short-range optical interconnect,ethernet,vertical cavity surface emitting laser (VCSEL),application layer adaptive forward error correction,commercial off-the-shelf optical transceiver
更新于2025-09-23 15:23:52
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Spoof Plasmon Interconnects— Communications beyond RC Limit
摘要： T HE inception of spoof surface plasmon polariton (SSPP) mode realized in planar, patterned conductors to manage light beyond diffraction limit at a chosen frequency garnered significant attention of late. We show that, an SSPP channel can be chosen to act in two distinct ways: first, as a regular RC limited electrical interconnect at low frequencies; and second, as an exotic, beyond RC limit communication channel near its resonant frequency by binding the electromagnetic field on its surface to the elimination of capacitance C. A dynamic transformation between these two modes can constitute an energy economic, tera-scale inter-chip hybrid communication network. We have investigated theoretical limits on the information transfer capability of SSPP interconnects. We show that, a geometry dependent trade-off relation between cross-talk limited bandwidth density and information traveling length emerges in SSPP based communication networks. According to our analysis, a bandwidth density of 1 Gbps/μm is attainable in SSPP communication network with ～ 10 mm information transfer distance, where each channel can carry ～ 300 Gbps information with nominal cross-talk.
关键词： Interconnect,Spoof Plasmon,bandwidth,Terahertz,thermal noise,information capacity
更新于2025-09-23 15:23:52
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Transport properties of doped zigzag graphene nanoribbons
摘要： Numerous studies on materials have driven the development of modern nanoelectronic devices. And research also shown that the integrated circuits have entered the era of the nanoelectronic scales from the scale of microelectronics. But the limitations of copper as a traditional connection, such as the resistivity increases a lot, further causing a lot of heat in the interconnect, have been highlighted. Therefore, we need new materials as the substitution of copper. The metallic properties exhibited by the zigzag graphene nanoribbons (ZGNRs) can be controlled by the edge states, doping and different widths of the nanoribbons. In this paper, we applied simulation to dope copper atom chains on ZGNRs. We found an energetic phenomenon that after doping the nanoribbons conductivity have increased significantly than the original. In addition, the transmission channels are mainly concentrated near the doping position, and the width used for transmission is greatly reduced after doping. It is expected to be used as an inter-connect application in nano-integrated circuits in the future.
关键词： Density functional theory,Interconnect,Electronic transport property,Non-equilibrium Green's function,Zigzag graphene nanoribbons,Doping
更新于2025-09-23 15:23:52
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[IEEE 2018 IEEE CPMT Symposium Japan (ICSJ) - Kyoto, Japan (2018.11.19-2018.11.21)] 2018 IEEE CPMT Symposium Japan (ICSJ) - A 53-Gbit/s VCSEL-Based High Density Optical Assembly for Large Capacity Optical Interconnection
摘要： A 53-Gbit/s VCSEL-based compact optical module is proposed. In order to realize 50-Gbit/s-class optical transmission, high-bandwidth optical devices are important. Accordingly, the feasibilities of a high speed optical circuit applying high-bandwidth (> 20 GHz) optical devices were studied by simulation. Moreover, an optical module at the receiver (Rx) side was fabricated on the basis of simulation results by applying our developed high density optical assembly techniques, and it successfully demonstrated 53.125-Gbit/s PAM4 multimode optical transmission.
关键词： compact optical module,High-density optical assembly,Optical interconnect,4-level pulse amplitude modulation (PAM4)
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE Photonics Conference (IPC) - Reston, VA (2018.9.30-2018.10.4)] 2018 IEEE Photonics Conference (IPC) - 3-Gbps Free Space Optical Link Based on Integrated Indium Phosphide Transmitter
摘要： A free space optical link was demonstrated with an integrated indium phosphide transmitter, tunable from 1521 nm to 1565 nm. Error-free operation was achieved at 3 Gbps for an equivalent link length of 180 m (up to 300 m with forward error correction).
关键词： sampled grating DBR laser,photonic integrated circuits,optical interconnect,Free space communication
更新于2025-09-23 15:22:29
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[IEEE 2019 20th International Conference on Electronic Packaging Technology(ICEPT) - Hong Kong, China (2019.8.12-2019.8.15)] 2019 20th International Conference on Electronic Packaging Technology(ICEPT) - Identification of essential factors causing solder bridging of right-angle solder interconnects in laser jet solder ball bonding process
摘要： Solder bridging is a commonly seen and serious processing defect in electronic packaging, which may lead to short circuit even absolute failure of electronic devices and products. Solder bridging may occur in all types of solder interconnects and in each of soldering processes during manufacturing journey, for example, in ball grid array solder interconnects and three-dimensional (3D) interconnects, as well as in wave soldering and reflow soldering assemblies. With the increasing trend towards miniaturization and multifunction, the pitch and size of solder interconnects have been scaling down. The finer pitch and decreased size of solder joints greatly increase the difficulty of soldering process and the solder bridging defect is more likely to appear. Notably, the laser jet solder ball bonding (LJSBB) with the advantages of localized heating and higher energy inputting provides a novel soldering technology for 3D packaging, for instance, the right-angle solder interconnects and temperature-sensitive components. When fabricating the right-angle solder interconnects, the liquid solder ball is blown by the protected N2 flow and hardly stays firmly in place during the LJSBB process, thus the solder bridging occurs more often in the LJSBB process. Under such circumstances, it is necessary to identify the essential factors causing solder bridging of right-angle solder interconnects and seeking the improvement measures for mass production.
关键词： displacement,solder bridging,poor wetting,laser jet solder ball bonding,right-angle solder interconnect
更新于2025-09-23 15:21:01
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Low-Voltage, Coupled Multiple Quantum Well Electroreflective Modulators towards Ultralow Power Inter-Chip Optical Interconnects
摘要： An electroreflective modulator based on multiple-pass electroabsorption (EA) of coupled multiple quantum wells (CMQWs) is demonstrated for integration with low-loss polymer optical waveguides towards inter-chip and on-board optical interconnects at 850 nm. Taking advantage of coupling between quantum states in MQWs, the top polymer cladding and the bottom Au mirror form a Fabry-Pérot cavity to further enhance the EA of CMQWs, thereby greatly improving the extinction ratio (ER) at a low voltage. The device achieves an ER of ~6 dB and an insertion loss (IL) <3 dB at 2 V, notably outperforming conventional surface-incident EA modulators at the same driving voltage. A further optimized modulator design can achieve a peak ER of 9-12 dB at 2V with a low IL of 2-3 dB and a relatively broad spectral bandwidth of ~10 nm. The low capacitance and reverse bias operation at a low voltage potentially offer ~10× lower power consumption compared to direct modulation of 850 nm lasers. This simple surface-incident CMQW modulator is a promising candidate for integration with ultralow power inter-chip and on-board interconnect architectures.
关键词： Modulator,Coupled Multiple Quantum Wells,Optical Interconnect,Fabry-Perot cavity,Electroabsorption
更新于2025-09-23 15:21:01
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Robust design of a broadband dual-polarized transition from PCB to circular dielectric waveguide for mm-wave applications
摘要： A growing interest in dielectric waveguides (DWGs) as an alternative to commonly used waveguides (like coaxial or twisted-pair cables) for high data rate interconnects could be observed in the last few years. Especially in the mm-wave frequency range (30–300 GHz) applications with these waveguides benefit from low losses and low dispersion. Moreover, using both polarizations of the fundamental mode in such waveguides could theoretically double the data rate without the need of higher bandwidth or additional fibers. The connection between DWGs and commonly available transceiver chips requires broadband transitions from planar waveguides like microstrip lines to DWGs. In this paper, an overview of the current developments of such transitions is given and a novel low-complexity design is presented that reduces the space consumption by 35% related to recently published works. This allows an easy integration into a printed circuit board layout or a chip package. Furthermore, an extensive sensitivity analysis is presented to prove the robustness toward manufacturing tolerances. The transition is realized at W-band frequencies (75–110 GHz) and achieves a relative 10 dB-bandwidth of more than 25% with a minimum insertion loss of 1.2 dB. It is shown that these properties even hold for manufacturing tolerances of nowadays manufacturing processes.
关键词： polymer microwave fiber,Dielectric waveguides,chip-to-chip interconnect,microstrip line,multi-gigabit,mm-wave
更新于2025-09-23 15:21:01
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Benchmarking Digital Die-to-Die Channels in 2.5-D and 3-D Heterogeneous Integration Platforms
摘要： In this paper, compact circuit models and HSPICE simulations are used to benchmark die-to-die communication channels in 2.5-D and 3-D heterogeneous integration platforms. The delay, energy-per-bit, and bandwidth-density of the considered integration platforms are simulated and benchmarked. Compared to other 2.5-D integrated systems with a 1-mm interconnect length, heterogeneous interconnect stitching technology (HIST)-based 2.5-D integration shows a maximum latency and energy reduction of 6.2% and 15.1%, respectively. 3-D ICs show further performance enhancement compared to 2.5-D integration; the link latency and energy are approximately 19.4% and 48.0% smaller than those of HIST (1-mm wire) for through-silicon via (TSV)-based 3-D integration (75-μm TSV height). Next, the impacts of the physical I/O interconnect dimensions and device process technology scaling are evaluated and we observe that advanced process technologies must be integrated with smaller physical I/O dimensions and shorter wire lengths to attain full advantages of scaling. Finally, we consider the thermal impact of dense heterogeneous integration and investigate the thermal and electrical signaling tradeoffs in 2.5-D and 3-D integration.
关键词： Die-to-die interconnect,interposer and bridge-chip 2.5-D ICs,signaling
更新于2025-09-23 15:21:01
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[IEEE 2018 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2018.6.18-2018.6.22)] 2018 IEEE Symposium on VLSI Technology - Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm <sup>2</sup> Optical I/O
摘要： We demonstrate a microbump flip-chip integrated 14nm-FinFET CMOS-Silicon Photonics (SiPh) technology platform enabling ultra-low power Optical I/O transceivers with 1.6Tb/s/mm2 bandwidth density. The transmitter combines a differential FinFET driver with a Si ring modulator, enabling 40Gb/s NRZ optical modulation at 154fJ/bit dynamic power consumption in a 0.015mm2 footprint. The receiver combines a FinFET trans-impedance amplifier (TIA) with a Ge photodiode, enabling 40Gb/s NRZ photodetection with -10.3dBm sensitivity at 75fJ/bit power consumption, in a 0.01mm2 footprint. High-quality data transmission and reception is demonstrated in a loop-back experiment at 1330nm wavelength over standard single mode fiber (SMF) link margin. Finally, a 4x40Gb/s, 0.1mm2 with 2dB wavelength-division multiplexing (WDM) transmitter with integrated thermal control is demonstrated, enabling Optical I/O scaling substantially beyond 100Gb/s per fiber.
关键词： optical interconnect,FinFET,silicon photonics
更新于2025-09-23 15:21:01