- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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[IEEE 2019 16th China International Forum on Solid State Lighting & 2019 International Forum on Wide Bandgap Semiconductors China (SSLChina: IFWS) - Shenzhen, China (2019.11.25-2019.11.27)] 2019 16th China International Forum on Solid State Lighting & 2019 International Forum on Wide Bandgap Semiconductors China (SSLChina: IFWS) - Optical and Thermal Designs of LED Matrix Module used in Automotive Headlamps
摘要： User manual designers generally use written procedures, figures, and illustrations to convey procedural information to end users. However, ensuring that the instructions are accurate and unambiguous is difficult. With respect to accuracy, describing the task and under what conditions it should be conducted can be complicated by considerations such as the ordering of actions within a higher level task and the context under which tasks and lower level actions can be initiated, repeated, and completed. With respect to ambiguity, component and task level issues occur such as which portion of a component is relevant and what context constrains activity. To support accuracy and to decrease ambiguity, we propose a model-based approach coupled with model checking and visualization to aid in user manual development. Our approach integrates formal task-analytic and device models with safety specifications into a computational framework. We demonstrate the value of this approach using alarm troubleshooting instructions from the patient user manual of a left ventricular assist device. By encoding a formal task model, we revealed potential problems with task and device descriptions in the troubleshooting instructions. We also applied linear temporal logic and symbolic model checking to identify issues with the order of troubleshooting steps. Our framework provides insights into the use of formal methods for patient user manual evaluation.
关键词： Formal methods,task analysis,user manuals,model checking,troubleshooting
更新于2025-09-19 17:13:59
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Automated formal verification of stand-alone solar photovoltaic systems
摘要： With declining costs and increasing performance, the deployment of renewable energy systems is growing faster. In 2017, for the first time, the number of people without access to electricity dropped down below 1 billion, but trends on energy access likewise fall short of global goals. Particular attention is given to stand-alone solar photovoltaic systems in rural areas or where grid extension is unfeasible. Tools to evaluate electrification projects are available, but they are based on simulations that do not cover all aspects of the design-space. Automated verification using model checking has proven to be an effective technique to validate complex (state transition) systems. This paper marks the first application of software model checking to formally verify the design of a stand-alone solar photovoltaic system, including solar panel, charge controller, battery, inverter, and electric load. Our main focus is on the project validation to be carried out just after the system sizing, i.e., prior to buying equipment and deployment, as a safe approach to ensure the intended behavior. Five case studies were used to evaluate this proposed approach and to compare that with specialized simulation tool. Different verification tools were evaluated to compare performance and soundness among automated verifiers. The results reported by our automated verification method and by the simulation tool were compared with data collected from dwellers of the deployed cases, thereby showing the effectiveness of our approach, where specific conditions that lead to failures in a solar photovoltaic system are only detailed by the automated verification method.
关键词： Model checking,Formal verification,Photovoltaic power systems
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE Conference on Energy Conversion (CENCON) - Yogyakarta, Indonesia (2019.10.16-2019.10.17)] 2019 IEEE Conference on Energy Conversion (CENCON) - Voltage Control of Parallel DC-DC Converter in Photovoltaics Based DC Microgrid
摘要： Cyber-Physical Systems (CPS) integrate discrete-time computing and continuous-time physical-world entities, which are often wirelessly interlinked. The use of wireless safety-critical CPS requires safety guarantees despite communication faults. This paper focuses on one important set of such safety rules: Proper-Temporal-Embedding (PTE), where distributed CPS entities must enter/leave risky states according to properly nested temporal pattern and certain duration spacing. Our solution introduces hybrid automata to formally describe and analyze CPS design patterns. We propose a novel leasing based design pattern, along with closed-form configuration constraints, to guarantee PTE safety rules under arbitrary wireless communication faults. We propose a formal procedure to transform the design pattern hybrid automata into specific wireless CPS designs. This procedure can effectively isolate physical world parameters from affecting the PTE safety of the resultant specific designs. We conduct two wireless CPS case studies, one on medicine and the other on control, to show that the resulted system is safe against communication failures. We also compare our approach with a polling based approach. Both approaches support PTE under arbitrary communication failures. The polling approach performs better under severely adverse wireless medium conditions; while ours performs better under benign or moderately adverse wireless medium conditions.
关键词： real-time,properly nested locking,mutual exclusion,Cyber-physical systems,hybrid systems model checking
更新于2025-09-19 17:13:59
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Realisation of compact quasi-elliptic bandpass filters based on coupled eighth-mode SIW cavities
摘要： Boolean satisfiability (SAT)Vthe problem of determining whether there exists an assignment satisfying a given Boolean formulaVis a fundamental intractable problem in computer science. SAT has many applications in electronic design automation (EDA), notably in synthesis and verification. Consequently, SAT has received much attention from the EDA community, who developed algorithms that have had a significant impact on the performance of SAT solvers. EDA researchers introduced techniques such as conflict-driven clause learning, novel branching heuristics, and efficient unit propagation. These techniques form the basis of all modern SAT solvers. Using these ideas, contemporary SAT solvers can often handle practical instances with millions of variables and constraints. The continuing advances of SAT solvers are the driving force of modern model checking tools, which are used to check the correctness of hardware designs. Contemporary automated verification techniques such as bounded model checking, proof-based abstraction, interpolation-based model checking, and IC3 have in common that they are all based on SAT solvers and their extensions. In this paper, we trace the most important contributions made to modern SAT solvers by the EDA community, and discuss applications of SAT in hardware model checking.
关键词： interpolation,proofs,model checking,satisfiability solving,IC3
更新于2025-09-19 17:13:59
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Single Layer Decoupled Multiple Order Generalized Integral Control for Single-Stage Solar Energy Grid Integrator with Maximum Power Extraction
摘要： User manual designers generally use written procedures, figures, and illustrations to convey procedural information to end users. However, ensuring that the instructions are accurate and unambiguous is difficult. With respect to accuracy, describing the task and under what conditions it should be conducted can be complicated by considerations such as the ordering of actions within a higher level task and the context under which tasks and lower level actions can be initiated, repeated, and completed. With respect to ambiguity, component and task level issues occur such as which portion of a component is relevant and what context constrains activity. To support accuracy and to decrease ambiguity, we propose a model-based approach coupled with model checking and visualization to aid in user manual development. Our approach integrates formal task-analytic and device models with safety specifications into a computational framework. We demonstrate the value of this approach using alarm troubleshooting instructions from the patient user manual of a left ventricular assist device. By encoding a formal task model, we revealed potential problems with task and device descriptions in the troubleshooting instructions. We also applied linear temporal logic and symbolic model checking to identify issues with the order of troubleshooting steps. Our framework provides insights into the use of formal methods for patient user manual evaluation.
关键词： user manuals,Formal methods,model checking,troubleshooting,task analysis
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Numerical simulation of CIGS solar cells with Zn(O,S) or (Cd,Zn)S buffers and (Zn,Mg)O as high-resistive layer
摘要： Existing algorithms for I/O Linear Temporal Logic (LTL) model checking usually output a single counterexample for a system which violates the property. However, in real-world applications, such as diagnosis and debugging in software and hardware system designs, people often need to have a set of counterexamples or even all counterexamples. For this purpose, we propose an I/O efficient approach for detecting all accepting cycles, called Detecting All Accepting Cycles (DAAC), where the properties to be verified are in LTL. Different from other algorithms for finding all cycles, DAAC first searches for the accepting strongly connected components (ASCCs), and then finds all accepting cycles of every ASCC, which can avoid searching for a great many paths that are impossible to be extended to accepting cycles. In order to further lower DAAC's I/O complexity and improve its performance, we propose an intersection computation technique and a dynamic path management technique, and exploit a minimal perfect hash function (MPHF). We carry out both complexity and experimental comparisons with the state-of-the-art algorithms including Detect Accepting Cycle (DAC), Maximal Accepting Predecessors (MAP) and Iterative-Deepening Depth-First Search (IDDFS). The comparative results show that our approach is better on the whole in terms of I/O complexity and practical performance, despite the fact that it finds all counterexamples.
关键词： state space explosion,accepting strongly connected component,breath-first search,detection of all accepting cycles,Model checking
更新于2025-09-19 17:13:59
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[IEEE 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Paris, France (2019.9.1-2019.9.6)] 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Full-field THz polarimetric imaging with THz quantum cascade laser and THz imager
摘要： Model checking is a powerful approach for the formal verification of hardware and software systems. However, this approach suffers from the state space explosion problem, which limits its application to large-scale systems due to space shortage. To overcome this drawback, one of the most effective solutions is to use external memory algorithms. In this paper, we propose an I/O efficient model checking algorithm for large-scale systems. To lower I/O complexity and improve time efficiency, we combine three new techniques: 1) a linear hash-sorting technique; 2) a cached duplicate detection technique; and 3) a dynamic path management technique. We show that the new algorithm has a lower I/O complexity than state-of-the-art I/O efficient model checking algorithms, including detect accepting cycle, maximal accepting predecessors, and iterative-deepening depth-first search. In addition, the experiments show that our algorithm obviously outperforms these three algorithms on the selected representative benchmarks in terms of performance.
关键词： state space explosion,model checking,Duplicate detection,linear hash-sorting,dynamic search path management
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 3rd Conference on Energy Internet and Energy System Integration (EI2) - Changsha, China (2019.11.8-2019.11.10)] 2019 IEEE 3rd Conference on Energy Internet and Energy System Integration (EI2) - Fractional-order Sliding Mode Control Strategy for Quasi-Z Source Photovoltaic Grid-Connected Inverter
摘要： Existing algorithms for I/O Linear Temporal Logic (LTL) model checking usually output a single counterexample for a system which violates the property. However, in real-world applications, such as diagnosis and debugging in software and hardware system designs, people often need to have a set of counterexamples or even all counterexamples. For this purpose, we propose an I/O efficient approach for detecting all accepting cycles, called Detecting All Accepting Cycles (DAAC), where the properties to be verified are in LTL. Different from other algorithms for finding all cycles, DAAC first searches for the accepting strongly connected components (ASCCs), and then finds all accepting cycles of every ASCC, which can avoid searching for a great many paths that are impossible to be extended to accepting cycles. In order to further lower DAAC's I/O complexity and improve its performance, we propose an intersection computation technique and a dynamic path management technique, and exploit a minimal perfect hash function (MPHF). We carry out both complexity and experimental comparisons with the state-of-the-art algorithms including Detect Accepting Cycle (DAC), Maximal Accepting Predecessors (MAP) and Iterative-Deepening Depth-First Search (IDDFS). The comparative results show that our approach is better on the whole in terms of I/O complexity and practical performance, despite the fact that it finds all counterexamples.
关键词： Model checking,state space explosion,accepting strongly connected component,breath-first search,detection of all accepting cycles
更新于2025-09-19 17:13:59
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[IEEE 2019 2nd International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT) - Kannur,Kerala, India (2019.7.5-2019.7.6)] 2019 2nd International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT) - PV fed High gain SEPIC-Boost converter for Vector controlled Induction Motor Drive
摘要： The ability of people to hear and respond to auditory medical alarms is critical to the health and safety of patients. Unfortunately, concurrently sounding alarms can perceptually interact in ways that mask one or more of them: making them impossible to hear. Because masking may only occur in extremely specific and/or rare situations, experimental evaluation techniques are insufficient for detecting masking in all of the potential alarm configurations used in medicine. Thus, a real need exists for computational methods capable of determining if masking exists in medical alarm configurations before they are deployed. In this paper, we present such a method. Using a combination of formal modeling, psychoacoustic modeling, temporal logic specification, and model checking, our method is able to prove whether a modeled of a configuration of alarms can interact in ways that produce masking. This paper provides the motivation for this method, presents its details, describes its implementation, demonstrates its power with a case study, and outlines future work.
关键词： psychoacoustics,medical alarms,Formal methods,patient safety,model checking,psychophysics
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - Sozopol, Bulgaria (2019.9.6-2019.9.8)] 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - CW Terahertz Laser Emitting Beams with Nonuniform Polarization
摘要： Boolean satisfiability (SAT)Vthe problem of determining whether there exists an assignment satisfying a given Boolean formulaVis a fundamental intractable problem in computer science. SAT has many applications in electronic design automation (EDA), notably in synthesis and verification. Consequently, SAT has received much attention from the EDA community, who developed algorithms that have had a significant impact on the performance of SAT solvers. EDA researchers introduced techniques such as conflict-driven clause learning, novel branching heuristics, and efficient unit propagation. These techniques form the basis of all modern SAT solvers. Using these ideas, contemporary SAT solvers can often handle practical instances with millions of variables and constraints. The continuing advances of SAT solvers are the driving force of modern model checking tools, which are used to check the correctness of hardware designs. Contemporary automated verification techniques such as bounded model checking, proof-based abstraction, interpolation-based model checking, and IC3 have in common that they are all based on SAT solvers and their extensions. In this paper, we trace the most important contributions made to modern SAT solvers by the EDA community, and discuss applications of SAT in hardware model checking.
关键词： model checking,interpolation,satisfiability solving,IC3,proofs
更新于2025-09-16 10:30:52