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Gas sensing characteristics of the FET-type gas sensor having inkjet-printed WS2 sensing layer
摘要： This paper investigates the gas sensing characteristics of the MOSFET-type sensor having an inkjet-printed WS2 sensing layer. The drain current of the gas sensor increases when NO2 gas is injected into the test chamber since NO2 gas is an oxidizing gas that extracts electrons from the sensing layer. On the contrary, the drain current decreases when H2S gas is injected into the test chamber since H2S gas is a reducing gas that donates electrons to the sensing layer. In both cases, the change of the drain current increases as the gas concentration increases. However, for other gases (NH3 and CO2), the gas sensor has a small change of the drain current. The responses of the gas sensor to 10 ppm NO2, H2S, NH3, and CO2 gases are 15.20%, 7.18%, 1.66%, and 3.02%, respectively. Therefore, the WS2 sensor has a high selectivity for NO2 gas among the four target gases.
关键词： MOSFET,Gas sensor,Inkjet printing,WS2
更新于2025-09-23 15:23:52
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Contactless parametric characterization of bandgap engineering in p-type FinFETs using spectral photon emission
摘要： In the last decade it has become increasingly popular to use germanium enriched silicon in modern field effect transistors (FET) due to the higher intrinsic mobility of both holes and electrons in SiGe as compared to Si. Whether used in the source/drain region (S/D) as compressive stressor, which is an efficient mobility booster on Si channel devices, or as channel material, the SiGe increases channel carrier mobility and thus enhancing device performance. Because the germanium content modifies the effective bandgap energy EG, this material characteristic is an important technology performance parameter. The bandgap energy can be determined in an LED-like operation of electronic devices, requiring forward biased p-n junctions. P-n junctions in FETs are source or drain to body diodes, usually grounded or reversely biased. This investigation applies a bias to the body that can trigger parasitic forward operation of the source/drain to body p-n junction in any FET. Spectral photon emission (SPE) is used here as a non-destructive method to characterize engineered bandgaps in operative transistor devices, while the device remains fully functional. Before applying the presented technique to a p-type FinFET device, it is put to the proof by verifying the nominal silicon bandgap on an (unstrained) 120 nm technology FET. Subsequently the characterization capability for bandgap engineering is then successfully demonstrated on a SiGe:C heterojunction bipolar transistor (HBT). In a final step, the bandgap energy EG of a 14/16 nm p-type FinFET was determined to be 0.84 eV, which corresponds to a Si0.7Ge0.3 mixture. The presented characterization technique is a contactless fault isolation method that allows for quantitative local investigation of engineered bandgaps in p-type FinFETs.
关键词： p-n junction,Heterojunction bipolar transistor,Bandgap characterization,p-channel FinFET,SiGe, strained Si,Body diode, parasitic operation,Bandgap engineering,Body bias voltage,HBT,Contactless fault isolation,Spectral photon emission,MOSFET
更新于2025-09-23 15:23:52
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Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates
摘要： A novel trench SOI LDMOS with centrosymmetric double vertical field plates structure (CDVFPT SOI LDMOS) is proposed in this paper. The 2-D device simulator MEDICI is used to investigate the characteristics of the proposed structure. Compared with the conventional trench SOI LDMOS (CT SOI LDMOS), the optimized device shows an obvious reduction in the specific on-resistance (Ron,sp) when its breakdown voltage (BV) is enhanced due to the introduction of centrosymmetric double vertical field plates structure. And when compared to previous device with floating vertical field plate trench SOI LDMOS (FVFPT SOI LDMOS), the overall performance of CDVFPT SOI LDMOS is also promoted. According to the simulation results, compared to a CT SOI LDMOS, the BV of CDVFPT SOI LDMOS increases from 188 V to 234 V. The Ron,sp, however, decreases from 2.30 mΩ·cm2 to 1.24 mΩ·cm2. In addition, the maximum lattice temperature at 1 mW/μm2 is slightly reduced.
关键词： Power MOSFET,Specific on-resistance,Vertical field plate,Breakdown voltage
更新于2025-09-23 15:23:52
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The 1.2 kV 4H-SiC OCTFET: A New Cell Topology with Improved High Frequency Figures-of-Merit
摘要： A 1.2 kV rated 4H-SiC OCTFET device with octagonal-cell topology is proposed and experimentally demonstrated for the first time. The device was first optimized using TCAD numerical simulations. Devices were then successfully fabricated in a 6 inch foundry. From the measured electrical characteristics, the OCTFET is demonstrated to have 1.4× superior HF-FOM [Ron×Qgd], and 2.1× superior HF-FOM [Ron×Cgd] compared with the conventional linear-cell MOSFET.
关键词： Silicon carbide,ALL,Octagonal,Qgd,HF-FOMs,Cell,Cgd,MOSFET,4H-SiC
更新于2025-09-23 15:23:52
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Simulation-Based Sensitivity Analysis of Conduction and Switching Losses for Silicon Carbide Power MOSFETs
摘要： The behavior of silicon carbide power MOSFETs is analyzed using TCAD device simulations with respect to conduction and switching losses. Device designs with varying breakdown voltages are simulated. The contributions to the on-state resistance are shown at room and elevated temperature. Whereas channel and substrate resistance dominate at low breakdown voltages, drift and JFET resistance dominate at high breakdown voltages. With increasing temperature, the channel resistance decreases and thus the drift resistance is the main contributor already at medium breakdown voltages. Manufacturing processes of a device can have a high influence on its losses. Variations in interface mobility, drift doping, and p-body doping can lead to a significant change of on-resistance, internal capacitances, and reverse recovery charge. For higher voltage classes the drift layer properties should be of major interest as it influences on-resistance and reverse recovery charge.
关键词： SiC power MOSFET,TCAD device simulation,sensitivity analysis,losses
更新于2025-09-23 15:23:52
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An adapted method for analyzing 4H silicon carbide metal-oxide-semiconductor field-effect transistors
摘要： Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) are key devices for next-generation power electronics. However, accurate determination of device parameters from 3-terminal characteristics is hampered by the presence of interface traps. Here we present a method that, in contrast to previous evaluation schemes, explicitly considers those defects. A well-tractable parametrization of the SiC/SiO2-specific interface trap spectrum is introduced that reflects the body of known data. With this ingredient, we develop an analysis that targets for an accurate determination of device parameters from simple 3-terminal characteristics. For its validation, we investigate MOSFETs with significantly different defect densities. The resulting parameters – charge carrier density, mobility and threshold voltage – are in excellent agreement with Hall effect investigations on the very same devices, avoiding systematic errors inherent to conventional evaluation techniques. With this adapted scheme, 4H-SiC power MOSFETs, even packaged, can be meaningfully characterized, speeding up innovation cycles in energy-saving power electronics.
关键词： mobility,Silicon carbide,Hall effect,interface traps,threshold voltage,MOSFET
更新于2025-09-23 15:23:52
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Effect of short-circuit stress on the degradation of the SiO2 dielectric in SiC power MOSFETs
摘要： This paper presents the impact of a short-circuit event on the gate reliability in planar SiC MOSFETs, which becomes more critical with increased junction temperature and higher bias voltages. The electrical waveforms indicate that a gate degradation mechanism takes place, showing a large gate leakage current that increases as the gate degrades more and more. A failure analysis has been performed on the degraded SiC MOSFET and then compared to the structure of a new device to identify possible defects/abnormalities. A Focused-Ion Beam cut is performed showing a number of differences in comparison to the new device: (i) cracks between the poly-silicon gate and aluminium source, (ii) metal particles near the source contact, and (iii) alterations in the top surface of the aluminium source. The defects have been correlated with the increase in gate-leakage current and drain-leakage current.
关键词： Focused-Ion Beam,Short circuit,Gate-oxide breakdown,Gate oxide,Degradation,Defects,Reliability,SiC MOSFET,Failure analysis,SEM
更新于2025-09-23 15:22:29
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Advanced Silicon Carbide Devices and Processing || Investigation of SiC/Oxide Interface Structures by Spectroscopic Ellipsometry
摘要： We have investigated SiC/oxide interface structures by the use of spectroscopic ellipsometry. The depth profile of the optical constants of thermally grown oxide layers on SiC was obtained by observing the slope-shaped oxide layers, and the results suggest the existence of the interface layers, around 1 nm in thickness, having high refractive index than those of both SiC and SiO2. The wavelength dispersions of optical constants of the interface layers were measured in the range of visible to deep UV spectral region, and we found the interface layers have similar dispersion to that of SiC, though the refractive indices are around 1 larger than SiC, which suggests the interface layers are neither transition layers nor roughness layers, but modified SiC, e.g., strained and/or modified composition. By the use of an in-situ ellipsometer, real-time observation of SiC oxidation was performed, and the growth rate enhancement was found in the thin thickness regime as in the case of Si oxidation, which cannot be explained by the Deal-Grove model proposed for Si oxidation. From the measurements of the oxidation temperature and oxygen partial pressure dependences of oxidation rate in the initial stage of oxidation, we have discussed the interface structures and their formation mechanisms within the framework of the interfacial Si-C emission model we proposed for SiC oxidation mechanism.
关键词： interface state density,SiC-MOSFET,SiC/oxide interface,SiC oxidation mechanism,spectroscopic ellipsometry
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE Energy Conversion Congress and Exposition (ECCE) - Portland, OR, USA (2018.9.23-2018.9.27)] 2018 IEEE Energy Conversion Congress and Exposition (ECCE) - Comparison Study of Surge Current Capability of Body Diode of SiC MOSFET and SiC Schottky Diode
摘要： The superior performance of the SiC MOSFETs operating in synchronous mode converter without external antiparallel SiC Schottky diodes have been demonstrated recently. However, there are few studies of the surge current capability of the SiC MOSFET's body diode, leading severe concern for its ruggedness in practical power converter applications. The purpose of this paper is to experimentally compare the non-repetitive surge current capability of the SiC MOSFET's intrinsic body diode and SiC Schottky diode, and analyze the physical mechanisms of their degradation after surge current stress. Their surge current capability and electrical characteristics before and after surge current stress are measured and analyzed. Experimental study shows that the non-repetitive peak surge current of the SiC MOSFET’s body diode is slightly larger than that of the SiC Schottky diodes. The degradation of the SiC Schottky diode after surge current stress is accompanied with the increase of drain leakage current, while the degradation of the SiC MOSFET after the body diode’s surge current stress is accompanied with the variation of the threshold voltage and input capacitance of the SiC MOSFET. The analysis shows that the degradation of the SiC MOSFET after the surge current stress may be correlated with the interface traps of SiC/SiO2 interface.
关键词： Body diode,SiC Schottky Diode,SiC MOSFET,Surge current
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK) - Kyoto, Japan (2018.6.21-2018.6.22)] 2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK) - Study on Threshold Voltage Hysteresis in GaN-Based Vertical Trench MOSFETs
摘要： In this paper, we studied hysteresis in transfer characteristics of GaN-based vertical trench MOSFETs fabricated using different process technologies for n+-GaN source layer. It was found that the device with epitaxially-grown source region can suppress hysteresis in the transfer characteristics compared to that with implanted source region.
关键词： ion implantation,threshold voltage,epitaxial growth,hysteresis,GaN,trench,MOSFET
更新于2025-09-23 15:22:29