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Channel-Length Dependent Performance Degradation of Thermally Stressed IGZO TFTs
摘要： The focus of this work is on the performance degradation of thermally stressed IGZO TFTs with SiO2 for both the gate dielectric and back-channel passivation material. I-V characteristics of TFTs with bottom-gate (BG) and double-gate (DG) electrode configurations were observed to left-shift and degrade with thermal stress. Experimental results indicate the instability occurs either directly or indirectly due to the influence of H2O within the passivation oxide above the IGZO channel region. An atomic layer deposition (ALD) alumina capping layer applied immediately following the passivation oxide anneal was successful in improving thermal stability. Channel length dependence was observed where longer channel DG devices were more prone to degradation. A hypothesis has been developed with H2O as the expected origin of this phenomenon. Experiments have been specifically designed to establish the feasibility of the proposed mechanism. Furthermore, DG devices which exhibit enhanced thermal stability are presented.
关键词： thermal stability,SiO2 passivation,ALD alumina capping,IGZO TFTs,channel length dependence
更新于2025-09-23 15:21:01
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In Situ SiO <sub/>2</sub> Passivation of Epitaxial (100) and (110)InGaAs by Exploiting TaSiO <sub/><i>x</i> </sub> Atomic Layer Deposition Process
摘要： In this work, an in situ SiO2 passivation technique using atomic layer deposition (ALD) during the growth of gate dielectric TaSiOx on solid-source molecular beam epitaxy grown (100)InxGa1?xAs and (110)InxGa1?xAs on InP substrates is reported. X-ray reciprocal space mapping demonstrated quasi-lattice matched InxGa1?xAs epitaxy on crystallographically oriented InP substrates. Cross-sectional transmission electron microscopy revealed sharp heterointerfaces between ALD TaSiOx and (100) and (110)InxGa1?xAs epilayers, wherein the presence of a consistent growth of an ～0.8 nm intentionally formed SiO2 interfacial passivating layer (IPL) is also observed on each of (100) and (110)InxGa1?xAs. X-ray photoelectron spectroscopy (XPS) revealed the incorporation of SiO2 in the composite TaSiOx, and valence band offset (ΔEV) values for TaSiOx relative to (100) and (110)InxGa1?xAs orientations of 2.52 ± 0.05 and 2.65 ± 0.05 eV, respectively, were extracted. The conduction band offset (ΔEC) was calculated to be 1.3 ± 0.1 eV for (100)InxGa1?xAs and 1.43 ± 0.1 eV for (110)InxGa1?xAs, using TaSiOx band gap values of 4.60 and 4.82 eV, respectively, determined from the fitted O 1s XPS loss spectra, and the literature-reported composition-dependent InxGa1?xAs band gap. The in situ passivation of InxGa1?xAs using SiO2 IPL during ALD of TaSiOx and the relatively large ΔEV and ΔEC values reported in this work are expected to aid in the future development of thermodynamically stable high-κ gate dielectrics on InxGa1?xAs with reduced gate leakage, particularly under low-power device operation.
关键词： in situ SiO2 passivation,atomic layer deposition,InxGa1?xAs,band alignment,TaSiOx,gate dielectric
更新于2025-09-23 15:21:01