- 标题
- 摘要
- 关键词
- 实验方案
- 产品
-
Single Flip-Chip Packaged Dielectric Resonator Antenna for CMOS Terahertz Antenna Array Gain Enhancement
摘要： A single dielectric resonator antenna (DRA) capable of enhancing the antenna gain of each element of a 2×2 THz antenna array realized in a 0.18-μm CMOS technology is proposed in this work. The DRA implemented in a low-cost integrated-passive-device (IPD) technology is flip-chip packaged onto the CMOS antenna array chip through low-loss gold bumps. By designing the DRA to work at the higher-order mode of TE3,δ,9, only single DRA instead of conventionally needing four DRAs is required to simultaneously improve the antenna gain of each element of the 2×2 antenna array. This not only simplifies the assembly process but it can also reduce the assembly cost. Moreover, the DRA can provide great antenna gain enhancement because of being made of high-resistivity silicon material and higher-order mode operation. The simulated antenna gain of each on-chip patch antenna of the 2×2 CMOS antenna array can be increased from 0.1 to 8.6 dBi at 339 GHz as the DRA is added. To characterize the proposed DRA, four identical power detectors (PDs) are designed and integrated with each element of the 2×2 THz antenna array, respectively. By measuring the voltage responsivity of each PD output, the characteristics of each antenna of the antenna array with the proposed DRA, including the gain enhancement level and radiation pattern, can be acquired. The measurement results follow well with the simulated ones, verifying the proposed DRA operation principle. The four PDs with the proposed DRA are also successfully employed to demonstrate a THz imaging system at 340 GHz. To the best of the authors’ knowledge, the proposed DRA is the one with the highest-order operation mode at THz frequencies reported thus far.
关键词： Silicon,Flip-chip packaging,Terahertz,CMOS,Terahertz imaging system,Antenna,Higher-order mode,Power detector,Dielectric resonator antenna
更新于2025-09-23 15:23:52
-
[IEEE 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - Erlagol (Altai Republic), Russia (2018.6.29-2018.7.3)] 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - An Interface Model of the Interconnection Between Integrated Circuit Chip Die and Printed Circuit Board
摘要： This work represents results obtained during research of high frequency IC packaging. The interface between IC die and PCB is described and its inner structure is developed: contact pads on IC die, bondwires and chip outputs. As an example of method developed the interface effects into device development and characteristics are shown for the LNA module as a part of the GPS receiver test chip.
关键词： LNA,Low noise amplifier,GPS,CMOS,chip packaging,Noise Figure
更新于2025-09-19 17:15:36