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oe1(光电查) - 科学论文

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出版时间
  • 2018
研究主题
  • contrast stretch
  • CMOS image sensor
  • point-of-care (POC) diagnosis
  • bio-microfluidic imaging
应用领域
  • Optoelectronic Information Science and Engineering
机构单位
  • Xi’an University of Technology
183 条数据
?? 中文（中国） ▾

  • Background Light Rejection in SPAD-Based LiDAR Sensors by Adaptive Photon Coincidence Detection

    摘要： Light detection and ranging (LiDAR) systems based on silicon single-photon avalanche diodes (SPAD) offer several advantages, like the fabrication of system-on-chips with a co-integrated detector and dedicated electronics, as well as low cost and high durability due to well-established CMOS technology. On the other hand, silicon-based detectors suffer from high background light in outdoor applications, like advanced driver assistance systems or autonomous driving, due to the limited wavelength range in the infrared spectrum. In this paper we present a novel method based on the adaptive adjustment of photon coincidence detection to suppress the background light and simultaneously improve the dynamic range. A major disadvantage of fixed parameter coincidence detection is the increased dynamic range of the resulting event rate, allowing good measurement performance only at a specific target reflectance. To overcome this limitation we have implemented adaptive photon coincidence detection. In this technique the parameters of the photon coincidence detection are adjusted to the actual measured background light intensity, giving a reduction of the event rate dynamic range and allowing the perception of high dynamic scenes. We present a 192 × 2 pixel CMOS SPAD-based LiDAR sensor utilizing this technique and accompanying outdoor measurements showing the capability of it. In this sensor adaptive photon coincidence detection improves the dynamic range of the measureable target reflectance by over 40 dB.

    关键词： system-on-chip (SoC),single-photon avalanche diode (SPAD),CMOS,light detection and ranging (LiDAR),time-of-flight (TOF),background light rejection

    更新于2025-09-23 15:22:29

  • [IEEE 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Tainan, Taiwan (2018.11.5-2018.11.7)] 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) - A Sub-Picosecond Hybrid DLL for Large-Scale Phased Array Synchronization

    摘要： A large-scale timing synchronization scheme for scalable phased arrays is presented. This approach utilizes a DLL co-designed with a subsequent 2.5GHz PLL. The DLL employs a low noise, fine/coarse delay tuning to reduce the in-band rms jitter to 323fs, an order of magnitude improvement over previous works at similar frequencies. The DLL was fabricated in a 65nm bulk CMOS process and was characterized from 27MHz to 270MHz. It consumes up to 3.3mW from a 1V power supply and has a small footprint of 0.036mm2.

    关键词： phase noise,tracking loops,CMOS integrated circuits,radio frequency,phase locked loops,phased-arrays,delay-lines

    更新于2025-09-23 15:22:29

  • [IEEE 2018 IEEE International Conference on Imaging Systems and Techniques (IST) - Krakow, Poland (2018.10.16-2018.10.18)] 2018 IEEE International Conference on Imaging Systems and Techniques (IST) - Extraction of Disparity Information Using Pixels with Integrated Apertures

    摘要： In this paper, extraction of disparity information using pixels with integrated apertures is presented. In general, the aperture of a camera is located over the camera lens. However, we propose the integration of apertures on the pixels of a CMOS image sensor. The integrated apertures are designed and fabricated using a metal layer of the CMOS image sensor process and the parameters including width and offset of the integrated apertures are optimized through optical simulation. The offset of the integrated aperture is defined as the distance between the center of the pixel and the center of the integrated aperture in a unit pixel. The optical simulation is based on a finite-difference time-domain method. Based on the optical simulation, the proposed image sensor with integrated apertures was fabricated using the CMOS image sensor process. The disparity information of the images is extracted using the fabricated image sensor and the performance of this sensor is evaluated through experiments.

    关键词： CMOS,image sensor,integrated aperture,disparity information

    更新于2025-09-23 15:22:29

  • Embedded Near-Infrared Sensor with Tunable Sensitivity for Nanoscale CMOS Technologies

    摘要： Near-infrared (NIR) sensors has become one of the key components in applications, such as temperature, proximity, and even ?ngerprint sensing. A novel full-CMOS (Complementary Metal-Oxide-Semiconductor) compatible near-infrared sensor is proposed and demonstrated in this article. This sensing device consists of a gateless transistor, enabling near-infrared photon absorption in the channel region. With a tunable channel barrier, this near-IR sensor also features a dynamic photo-response with an extending sensing range up to 60 dB.

    关键词： full-silicon NIR photodetector,near-infrared sensing,CMOS process compatible

    更新于2025-09-23 15:22:29

  • $${\mathscr{P}}{\mathscr{T}}$$PT-symmetric interference transistor

    摘要： We present a model of the molecular transistor, operation of which is based on the interplay between two physical mechanisms, peculiar to open quantum systems that act in concert: PT-symmetry breaking corresponding to coalescence of resonances at the exceptional point of the molecule, connected to the leads, and Fano-Feshbach antiresonance. This switching mechanism can be realised in particular in a special class of molecules with degenerate energy levels, e.g. diradicals, which possess mirror symmetry. At zero gate voltage infinitesimally small interaction of the molecule with the leads breaks the PT-symmetry of the system that, however, can be restored by application of the gate voltage preserving the mirror symmetry. PT-symmetry broken state at zero gate voltage with minimal transmission corresponds to the “off” state while the PT-symmetric state at non-zero gate voltage with maximum transmission – to the “on” state. At zero gate voltage energy of the antiresonance coincides with exceptional point. We construct a model of an all-electrical molecular switch based on such transistors acting as a conventional CMOS inverter and show that essentially lower power consumption and switching energy can be achieved, compared to the CMOS analogues.

    关键词： diradicals,molecular transistor,CMOS inverter,quantum systems,PT-symmetric interference,Fano-Feshbach antiresonance

    更新于2025-09-23 15:21:21

  • [IEEE 2018 Iranian Conference on Electrical Engineering (ICEE) - Mashhad (2018.5.8-2018.5.10)] Electrical Engineering (ICEE), Iranian Conference on - A New 10 Gb/s Optical Receiver Using Active Inductor in 90 nm CMOS Technology

    摘要： This paper presents the design of a new low-power 10 Gb/s CMOS optical receiver in 90nm consisting of a transimpedance amplifier and two stages of a limiting amplifier. The transimpedance amplifier consists of two stages, and has a transimpedance gain of 54.8 dB(cid:159) and -3 dB bandwidth of 8 GHz for 0.15 pF input capacitance while dissipating 4.64 mW. The two-stage limiting amplifier employs a differential topology with active feedback. The complete optical receiver has a gain of 82.6 dB(cid:159), bandwidth of 8 GHz and consumes 13.64 mW from a 1-V supply.

    关键词： low power,optical receiver,limiting amplifier,CMOS,transimpedance amplifier

    更新于2025-09-23 15:21:21

  • A Dual-Mode RF Power Harvesting System With an On-Chip Coil in 180-nm SOI CMOS for Millimeter-Sized Biomedical Implants

    摘要： In this paper, we present a dual-mode power harvesting system for millimeter-sized biomedical implants that are immune to the variation of wireless link parameters and loading. The design includes a multistage full-wave voltage rectifier, a power management unit, and a low dropout voltage regulator. Depending on the received RF power level and the required power by the load, power delivery is conducted in a continuous or duty-cycled mode. The system is fabricated in 180-nm silicon on insulator (SOI) CMOS technology with an active area of 2.56 mm2 including an on-chip coil. RF power is transferred to the chip from a 2 × 2 cm2 coil through 10 mm of air at 434 MHz. The efficiency of the designed wireless link, which is the power transfer efficiency from the external coil to the on-chip coil, reaches up to 0.68% (?21.7 dB) at 10-mm separation through air. Keeping the transmitted RF power below 24 dBm, the system can provide a 1.08-V dc voltage for resistive loads larger than 20 kΩ continuously over time. When the harvested power is not enough to drive the load continuously, the system operates in the duty-cycled mode. Measurement results show that the system can drive a 1-kΩ load in the duty-cycled mode when the transmitted power level is 15 dBm.

    关键词： voltage rectifier,millimeter-sized implant,power management,on-chip coil,CMOS,rectenna,low dropout (LDO) regulator,wireless power transfer (WPT)

    更新于2025-09-23 15:21:21

  • Distance-Resolving Raman Radar Based on a Time-Correlated CMOS Single-Photon Avalanche Diode Line Sensor

    摘要： Remote Raman spectroscopy is widely used to detect minerals, explosives and air pollution, for example. One of its main problems, however, is background radiation that is caused by ambient light and sample fluorescence. We present here, to the best of our knowledge, the first time a distance-resolving Raman radar device that is based on an adjustable, time-correlated complementary metal-oxide-semiconductor (CMOS) single-photon avalanche diode line sensor which can measure the location of the target sample simultaneously with the normal stand-off spectrometer operation and suppress the background radiation dramatically by means of sub-nanosecond time gating. A distance resolution of 3.75 cm could be verified simultaneously during normal spectrometer operation and Raman spectra of titanium dioxide were distinguished by this system at distances of 250 cm and 100 cm with illumination intensities of the background of 250 lux and 7600 lux, respectively. In addition, the major Raman peaks of olive oil, which has a fluorescence-to-Raman signal ratio of 33 and a fluorescence lifetime of 2.5 ns, were distinguished at a distance of 30 cm with a 250 lux background illumination intensity. We believe that this kind of time-correlated CMOS single-photon avalanche diode sensor could pave the way for new compact distance-resolving Raman radars for application where distance information within a range of several metres is needed at the same time as a Raman spectrum.

    关键词： time-correlated single photon counting (TCSPC),remote Raman spectroscopy,CMOS single-photon avalanche diode (SPAD),time interval measurement,distance-resolving Raman radar,stand-off Raman spectrometer

    更新于2025-09-23 15:21:21

  • <i>(Invited)</i> Proximity Gettering Design of Hydrocarbon Molecular Ion Implanted Silicon Wafers Using Direct Bonding Technique for Advanced CMOS Image Sensors: A Review

    摘要： We developed high gettering capability silicon wafers for advanced CMOS image sensors using hydrocarbon molecular ion implantation and surface activated direct wafer bonding (SAB). We found that this novel wafer has three unique characteristics for the improvement of CMOS image sensor device performance. The first is metallic impurity gettering capability in the hydrocarbon ion implantation projection range during CMOS device fabrication. The second is the oxygen out-diffusion barrier effect; this wafer can control out-diffusion to the device active region from the CZ grown silicon substrate during CMOS device heat treatment. The third is the hydrogen passivation effect; hydrogen passivates to the Si/SiO2 gate oxide interface state defects which out-diffuse to the device active region from the hydrocarbon ion implantation projection range during the CMOS device fabrication. Moreover, we demonstrated that this novel wafer can improve the pn-junction leakage current under the actual device fabrication.

    关键词： CMOS image sensors,hydrocarbon molecular ion implantation,surface activated direct wafer bonding,gettering capability,oxygen out-diffusion barrier,hydrogen passivation

    更新于2025-09-23 15:21:21

  • 8-GHz Locking Range and 0.4-pJ Low-Energy Differential Dual-Modulus 10/11 Prescaler

    摘要： In this paper, we present a differential dual-modulus prescaler based on an injection-locked frequency divider (ILFD) for satellite low-noise block (LNB) down-converters. We fabricated three-stage differential latches using an ILFD and a cascaded differential divider in a 130-nm CMOS process. The prototype chip core area occupies 40 μm × 20 μm. The proposed prescaler achieved the locking range of 2.1–10 GHz with both divide-by-10 and divide-by-11 operations at a supply voltage of 1.4 V. Normalized energy consumptions are 0.4 pJ (= mW/GHz) at a 1.4-V supply voltage and 0.24 pJ at a 1.2-V supply voltage. To evaluate the tolerance of phase-difference deviation of the input differential pair from the perfect differential phase-difference, 180 degrees, we measured the operational frequencies for various phase-difference inputs. The proposed prescaler achieved the operational frequency range of 2.1–10 GHz with an input phase-difference deviation of less than 90 degrees. However, the range of operational frequency decreases as the phase-difference deviation increases beyond 90 degrees and reaches 3.9–7.9 GHz for the phase-difference deviation of 180 degrees (i.e. no phase difference). In addition, to confirm the fully locking operation, we measured the spurious noise and the phase noise degradation while reducing the supply voltage. The sensitivity analysis of the prescaler for various supply voltages can explain the above degradation of spectral purity. Spurious noise arises and the phase noise degrades with decreasing supply voltage due to the quasi- and non-locking operations. We verified the fully-locking operation for the LNB down-converter at a 1.4-V supply voltage.

    关键词： CMOS,prescaler,ILFD,phase noise,phase difference

    更新于2025-09-23 15:21:21