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[IEEE 2020 5th International Conference on Devices, Circuits and Systems (ICDCS) - Coimbatore, India (2020.3.5-2020.3.6)] 2020 5th International Conference on Devices, Circuits and Systems (ICDCS) - Heterojunction Tunnel Field Effect Transistors a?? A Detailed Review
摘要： Tunnel FET(TFET) can provide ultra-low quiescent (~pA) current. Some of the essential parameters for determining the characteristics of TFET are high ION current, constrained Subthreshold slope value, and reduced ambipolar leakage. TFET experiences a sub-threshold decrease of less than 60mV / decade in the process of the sub-threshold slope and hence higher transconductance per bias current than MOSFET. This article would be beneficial to get a review of various device structures and their performances of Tunnel FET. In this paper, we examined the multiple TFET device structures and compared their performances for attaining the desired ION / IOFF.
关键词： Tunnel FET(TFET),ambipolar,ION / IOFF
更新于2025-09-23 15:19:57
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[IEEE 2019 Sixteenth International Conference on Wireless and Optical Communication Networks (WOCN) - Bhopal, India (2019.12.19-2019.12.21)] 2019 Sixteenth International Conference on Wireless and Optical Communication Networks (WOCN) - Stub Loaded Semi-Circular Resonator for Filter Applications
摘要： Tunnel FETs (TFETs) have been identified as the most promising steep slope devices for ultralow power logic circuits. In this paper, we demonstrate in-plane InAs/Si TFETs monolithically integrated on Si, using our recently developed template-assisted selective epitaxy approach. These devices represent some of the most scaled TFETs with dimensions of less than 30 nm, combined with excellent aggregate performance with average subthreshold swing (SS), of around 70 mV/decade combined with ION of a few μA/μm for |VDS| = |VGS| = 0.5 V. Here, we will discuss the device fabrication as well as the experimental electrical data. Extensive low temperature characterization and activation energy analysis is used to gain insights into the factors limiting device performance. Combined with the simulation study presented in part 2 of this paper, this will elucidate how traps are ultimately limiting the SS.
关键词： selective epitaxy,tunnel FET (TFET),InAs,Heterojunction device
更新于2025-09-16 10:30:52
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[IEEE 2018 Conference on Emerging Devices and Smart Systems (ICEDSS) - Tiruchengode, India (2018.3.2-2018.3.3)] 2018 Conference on Emerging Devices and Smart Systems (ICEDSS) - A Comparison of Analytical Modeling of Double Gate and Dual material Double GateTFETs with high-KStacked Gate-Oxide Structure forLow power Applications
摘要： In this paper, an analytical comparative study of Double Gate Tunnel Field Effect Transistors(DG-TFETs) and Dual Material Double Gate Tunnel Field Effect Transistors(DMDG-TFETs) with high-K stacked gate oxide structure are presented. The modeling is done by solving the Poisson’s equation with Parabolic Approximation Technique with suitable boundary conditions. By using channel potential model, Surface potential is calculated.The Drain current model is developed by integrating band to band tunneling generation rate. The different electrical characteristics like surface potential, Electric field and Drain current have been compared for both TFETs in this paper. On comparing DG-TFETs with Dual material, DMDG-TFETs provide an enhanced performance. The analytical results are also compared with TCAD simulated results for both the devices and good agreement is observed.
关键词： Band-to-band tunneling (BTBT),Tunnel FET (TFET),Dual-material (DM) gate,Parabolic Approximation Technique
更新于2025-09-09 09:28:46