- 标题
- 摘要
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GaN Transistors for Efficient Power Conversion || Driving GaN Transistors
摘要： This chapter discusses the basic techniques for using GaN transistors in high performance power conversion circuits. GaN transistors generally behave like power MOSFETs, but at much higher switching speeds and power densities. A good understanding of these similarities and differences is fundamental to understanding by how much existing power conversion systems can be improved by using GaN-based device technologies. The next three chapters highlight the benefits of GaN technology, design techniques for maximum performance, and ways to avoid common pitfalls that can result from the new GaN performance capabilities. Techniques to be addressed include: how to drive a GaN transistor, how to layout a high-efficiency GaN transistor circuit, and how to model and measure, both thermally and electrically, a high power-density GaN transistor-based circuit.
关键词： power conversion,cascode configuration,GaN transistors,switching speeds,enhancement-mode,power densities
更新于2025-09-23 15:21:01
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[IEEE 2018 IEEE 9th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON) - Vancouver, BC, Canada (2018.11.1-2018.11.3)] 2018 IEEE 9th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON) - A CNTFET based Multi-Stage Transimpedance Amplifier for Blood Glucose Monitoring Systems
摘要： In this paper, the design of an ultra-low-power, low noise carbon nanotube field effect transistor (CNTFET) based transimpedance amplifier (TIA) for an amperometric based blood glucose monitoring system for wearable devices is presented. The proposed cascode common source multi-stage TIA is designed and implemented in CNTFET technology. It has been demonstrated that the performance of the proposed TIA can be enhanced by considering an optimum number of CNTs, the CNT pitch and CNT diameter. The TIA shows a significant transimpedance gain, 572 M?, with a bandwidth of 200 MHz and an input referred current noise of 8.3 fA/√Hz for an input current of 2 nA. The total power consumption is 11 pW with a 1.8 V supply.
关键词： CNTFET,TIA,Multi-Stage,Low-Power,Cascode-Common-Source
更新于2025-09-19 17:15:36
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A 10?Gb/s noise-canceled transimpedance amplifier for optical communication receivers
摘要： This study presents a noise-canceled transimpedance ampli?er (TIA) for optical receivers. The proposed structure consists of a shunt feedback common source ampli?er as an input stage followed by two regulated cascodes (RGC) and ?nally a differential to the single-ended ampli?er at the output stage. By exploiting the noise-canceling technique at the input stage, 31.8% of the total output noise is canceled. In addition, the auxiliary path’s RGC circuit, as it has a low input impedance, is utilized to cancel out the photodiode (PD) large parasitic capacitance at the input stage. The proposed TIA along with post ampli?ers, including packaging components, are simulated in TSMC 90 nm RF CMOS technology at the post-layout level. The TIA average input-referred current noise is equal to 9:5 pA= ??????Hz . The PD capacitance is considered as 325 fF for all simulations. The transimpedance gain is equal to 60 dBX and the 3-dB bandwidth is equal to 7 GHz. The power con- sumption of the proposed TIA is 3.6 mW from a 1.2 V supply voltage. The TIA occupies a chip area of 0.036 mm2.
关键词： Regulated cascode,Noise-canceling,Transimpedance ampli?er,Shunt feedback
更新于2025-09-16 10:30:52
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Cryogenic Characterization of RF Low-Noise Amplifiers Utilizing Inverse-Mode SiGe HBTs for Extreme Environment Applications
摘要： The cryogenic performance of radiation-hardened radio-frequency (RF) low-noise amplifiers (LNAs) is presented. The LNA, which was originally proposed for the mitigation of single-event transients (SETs) in a radiation environment, uses inverse-mode silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) in its core cascode stages. In this prototype, the upper common-base SiGe HBT is configured in inverse mode for balanced RF performance and reduced SET sensitivity. In order to better exploit the inverse-mode LNAs in a variety of extreme-environment applications, the RF performance of the LNA was characterized using liquid nitrogen to evaluate cryogenic operation down to 78 K. While the SiGe LNA exhibits acceptable RF performance for all temperature conditions, there is a noticeable gain drop observed at 78 K compared to the conventional forward-mode design. This is attributed to the limited high-frequency performance of an inverse-mode SiGe HBT. As a guideline, compensation techniques including layout modifications and profile optimization are discussed for the mitigation of the observed gain degradation.
关键词： low-noise amplifier (LNA),heterojunction bipolar transistor (HBT),cascode,inverse mode,extreme environment,cryogenic measurement,silicon-germanium (SiGe)
更新于2025-09-11 14:15:04
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Simulation Model Development for Packaged Cascode Gallium Nitride Field-Effect Transistors
摘要： This paper presents a simple behavioral model with experimentally extracted parameters for packaged cascode gallium nitride (GaN) field-effect transistors (FETs). This study combined a level-1 metal–oxide–semiconductor field-effect transistor (MOSFET), a junction field-effect transistor (JFET), and a diode model to simulate a cascode GaN FET, in which a JFET was used to simulate a metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT). Using the JFET to simulate the MIS-HEMT not only ensures that the curve fits an S-shape transfer characteristic but also enables the pinch-off voltages extracted from the threshold voltage of the MIS-HEMT to be used as a watershed to distinguish where the drop in parasitic capacitance occurs. Parameter extraction was based on static and dynamic characteristics, which involved simulating the behavior of the created GaN FET model and comparing the extracted parameters with experimental measurements to demonstrate the accuracy of the simulation program with an integrated circuit emphasis (SPICE) model. Cascode capacitance was analyzed and verified through experimental measurements and SPICE simulations. The analysis revealed that the capacitance of low-voltage MOSFETs plays a critical role in increasing the overall capacitance of cascode GaN FETs. The turn-off resistance mechanism effectively described the leakage current, and a double-pulse tester was used to evaluate the switching performance of the fabricated cascode GaN FET. LTspice simulation software was adopted to compare the experimental switching results. Overall, the simulation results were strongly in agreement with the experimental results.
关键词： turn-off resistance,GaN FET,MIS-HEMT,SPICE,cascode,behavioral model,parasitic capacitance
更新于2025-09-10 09:29:36
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Recent Developments Accelerating SiC Adoption
摘要： The benefits of SiC devices for use in power electronics has been long understood, and over 25 years of sustained development in materials and devices has brought adoption to a tipping point [1,15]. It takes the confluence of many separate developments to build the necessary momentum for accelerated adoption, and we will examine these factors.
关键词： SiC MOSFET,SiC reliability,SiC Schottky Diode,SiC gate oxide,SiC Cascode,Supercascode,Silicon Carbide,SiC,SiC packaging,SiC applications,SiC epitaxy,SiC substrates
更新于2025-09-09 09:28:46
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[IEEE 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Atlanta, GA, USA (2018.10.31-2018.11.2)] 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Investigation of Performance Degradation in Enhancement-Mode GaN HEMTs under Accelerated Aging
摘要： In this paper, the performance degradation of enhancement-mode (E-mode) GaN HEMFs under accelerated aging is presented in detail. A real-time degradation monitoring tool is essential to prevent costly shutdowns and minimize safety concerns. Specifically, a DC power cycling setup is first designed which operates within the safe operating area (SOA) of the device to mimic the field operation and accelerate the aging process. The E-mode GaN devices are mounted on a custom designed PCB adaptor to accommodate the curve tracer where all the parasitics are carefully controlled to minimize the measurement errors. Using the curve tracer, the parameter shifts are periodically monitored at certain aging cycles. From the experimental results, it is observed that the on-state resistance and the threshold voltage are gradually increasing over the aging cycles, which makes potential failure precursors. Meanwhile, a variation in the transfer characteristics is observed, and the transconductance decreases as the device is aged. Finally, a detailed theoretical analysis is provided to explain this parameter shift in experiments.
关键词： Power cycling,Cascode GaN device,Failure model,Aging precursor
更新于2025-09-04 15:30:14
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[IEEE 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Atlanta, GA, USA (2018.10.31-2018.11.2)] 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - 6.5kV SiC JFET-based Super Cascode Power Module with High Avalanche Energy Handling Capability
摘要： A new Super Cascode Power Module (SCPM) topology was designed, and a 6.5kV/100A implementation was fabricated and tested. Simulation and test results show 175kHz switching with 28ns switching time. Vulnerability to avalanche energy was observed, and a solution was proposed and verified with simulation. Simulation shows more than 99% of the avalanche energy is diverted to the power devices from balancing diodes, which have much smaller die size compared with the power device.
关键词： avalanche energy,super cascode,SiC JFET
更新于2025-09-04 15:30:14