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Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO<sub>2</sub> Gate Dielectric
摘要： We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to improve VT instability and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3 interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VT shift are realized.
关键词： Silicon carbide,Lanthanum Silicate,Atomic layer deposition,Forming Gas Annealing
更新于2025-09-23 15:21:21
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Effect of Post Oxide Annealing on the Electrical and Interface 4H-SiC/Al<sub>2</sub>O<sub>3</sub> MOS Capacitors
摘要： This paper reports on the effect of forming gas annealing on the C-V characteristics and stability of Al2O3/SiC MOS capacitors deposited by atomic layer deposition, (ALD). C-V and I-V measurements were performed to assess the quality of the Al2O3 layer and the Al2O3/SiC interface. In comparison to as-deposited sample, the post oxide annealing (POA) in forming gas at high temperatures has improved the stability of C-V characteristic and the properties at the interface of Al2O3/SiC capacitors. However, the oxide capacitance and oxide breakdown electric field degrade with increased annealing temperature. The results provide indications to improve the performance of Al2O3/SiC capacitors 4H-SiC devices by optimizing the annealing temperature.
关键词： forming gas,Al2O3,atomic layer deposition,interface state density,4H-SiC
更新于2025-09-23 15:21:21
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Lack of correlation between C-V hysteresis and capacitance frequency dispersion in accumulation of metal gate/high- <i>k</i> /n-InGaAs metal-oxide-semiconductor stacks
摘要： The correlation between capacitance-voltage hysteresis and accumulation capacitance frequency dispersion of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks is experimentally assessed. Samples fabricated employing forming gas annealing (FGA) or substrate air exposure to obtain different densities of defects were thoroughly characterized and the results were compared with previous literature on the topic. Results indicate a lack of correlation between capacitance-voltage hysteresis and accumulation capacitance dispersion with frequency, suggesting that defects with remarkably different kinetics are involved in each phenomenon. This is assessed through the dependence of the capacitance-voltage hysteresis with DC bias and stress time, observing that permanent interface defect depassivation under bias has no effect on the hysteresis width after stress. Overall, capacitance-voltage hysteresis probes slow trapping mechanisms throughout the oxide and the bandgap, which are consistent with the negative charge trapping characteristic of the current-time curves for FGA samples at constant voltage stress. Instead, accumulation capacitance frequency dispersion probes defects with short trapping/detrapping characteristic times that can be linked to the stress induced leakage current of air exposed samples under constant DC stress. Experimental results indicate that each effect must be assessed separately due to the large difference in the kinetics of the probed defects.
关键词： metal-oxide-semiconductor stacks,forming gas annealing,defects,metal gate/high-k/n-InGaAs,trapping mechanisms,capacitance-voltage hysteresis,accumulation capacitance frequency dispersion
更新于2025-09-04 15:30:14