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- 摘要
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- 实验方案
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Readout chain validation of INFN modules for the CTA-pSCT camera
摘要： The Italian Institute of Nuclear Physics (INFN) is currently involved in the R&D for the integration of Fondazione Bruno Kessler (FBK) Silicon Photomultipliers (SiPM) in the focal plane camera for the prototype of the Schwarzschild–Couder Telescope (pSCT) proposed to integrate the Cherenkov Telescope Array (CTA) observatory. High density FBK SiPMs optimized for the detection of Near Ultraviolet Cherenkov light (NUV-HD) will be used to equip the camera, coupled to the TARGET-7 readout electronics. A first production of 9 INFN modules is being tested and will be installed on the focal plane of the pSCT camera. Each module consists of 64 6 mm × 6 mm pixels, based on 40 μm × 40 μm microcells, arranged in 16-pixel matrices. The front-end electronics is based on the TARGET-7 ASIC, a 16-channel chip for sampling and digitization of the signal. Here we report measurements of the performances of the complete readout chain, including results regarding homogeneity in terms of gain and signal-to-noise ratio.
关键词： Cherenkov Telescopes,Photo detectors,SiPM,Front-end electronics
更新于2025-09-23 15:23:52
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Development of a sub-miniature gamma camera for multimodal imaging system
摘要： In the recent past, gamma-ray imaging detectors have achieved an intrinsic spatial resolution of less than 1 mm within a few centimeters of a useful field of view (UFOV). Unlike to conventional gamma cameras, which are large and heavy, the compact gamma-ray imaging detectors can improve the performances of the gamma cameras used in the various fields. In this study, we developed a sub-miniature gamma camera for a multimodal imaging system. The camera has a gamma-ray detector, miniature electronics modules, and a diverging hole collimator. The detector consisted of the sub-millimeter pixelated Ce:GAGG array and the silicon photomultiplier (SiPM) array module. We organized the miniature electronics modules according to the functions; an MPPC base board, analog signal processing board, integrated power supply board, and compact data acquisition (DAQ) base board. The diverging hole collimator widened an imaging area of the gamma camera from the UFOV of the detector. On the detector side, dimensions of each hole and septa were identical to the pixel and inter-pixel thickness of the reflector of scintillator array. For the intrinsic performance test, we acquired a flood map image of 729 (27 × 27) scintillator pixels, and the energy resolution was 18.9 % for an integrated energy histogram of 99mTc (140 keV). For the extrinsic performance test, we used the 57Co sheet source, and made a 99mTc line source using a capillary tube. The sources located at 10 cm apart from the collimator surface. The imaging area was three times wider than the UFOV of the detector. The system sensitivity was 19 CPM/μCi and the spatial resolution was 3.5 mm. The usability of the proposed gamma camera will not be confined to existing applications due to its compactness and novelty.
关键词： Sub-miniature gamma camera,Gamma camera performance evaluation,Front-end electronics,Multimodal imaging system,Diverging hole collimator
更新于2025-09-23 15:23:52
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[IEEE 2018 IEEE XXVII International Scientific Conference Electronics (ET) - Sozopol, Bulgaria (2018.9.13-2018.9.15)] 2018 IEEE XXVII International Scientific Conference Electronics - ET - Performance of the Front-End Electronics of the PADME charged particle detector system
摘要： The PADME charged particle detector system should detect positrons and electrons with efficiency better than 99 % and time resolution below 1 ns. The system hosts about 200 readout electronics channels whose operation has to be verified and commissioned. A custom based test system allowing to perform qualitative check of the produced front-end electronics has been developed and was used to test a total of 256 channels. The obtained time resolution was found to be consistent with the requirements and better than 500 ps for all the channels.
关键词： scintillation detectors,front-end electronics,LED driver
更新于2025-09-23 15:23:52
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Experimental performance of a highly-innovative low-noise charge-sensitive preamplifier with integrated range-booster
摘要： Integrated charge-sensitive preamplifiers suffer from a reduced available dynamic range respect to discrete-type equivalents. This is due to the limits on maximum supply voltages that modern scaled technologies can tolerate. In this work we present a low-noise low-power integrated charge-sensitive preamplifier (CSP) for solid-state detectors. This device is equipped with an integrated range-booster that can enhance the spectroscopic range of the preamplifier by more than one order of magnitude, enabling high-resolution spectroscopy even if the preamplifier is in deep saturation condition. If the input signals from the detector are under the natural saturation threshold (40 MeV), the preamplifier works in an usual linear way, producing at the output the typical exponential signals. With proper filtering a resolution of approximately 1 keV is achievable. When a large signal from the detector saturates the preamplifier, a sensing circuit detects the saturation and switches the operation mode of the CSP to the “fast-reset mode”. In this mode a constant and controlled current generator discharges the input node of the preamplifier until the normal operating point is reached. Meanwhile an auxiliary circuit similar to a TAC (Time-to-Amplitude converter) retrieves the energy of the signal that caused saturation. Although the natural dynamic range of the CSP is 40 MeV, the fast-reset mode enables for high-resolution spectroscopy (under 0.2% FWHM) up to several hundreds of MeV (700 MeV typically). One issue in this kind of circuits is the dependence of the energy measured with the TAC circuit on the baseline value of the CSP before the “fast-reset event” [5]. As a solution to this problem we propose a correction algorithm implemented inside the TAC block in the form of an analog circuit. On a test-bench a series of large 3 pC charge signals is injected in the input node of the preamplifier through a test capacitor. Before these events, residual charges ranging from 0 to 0.56 pC produce non-zero baseline voltages at the output of the CSP. The TAC with correction not only retrieves correctly the energy of the main event, but also rejects the baseline voltages, leaving the energy measurement unaffected. The fluctuations of the flat-top voltage in the signals produced by the auxiliary TAC circuit due to the different baseline voltages are under the 0.6% of the total signal amplitude.
关键词： Front-end electronics for detector readout,VLSI circuits,Analogue electronic circuits,Electronic detector readout concepts (solid-state)
更新于2025-09-23 15:23:52
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Addressing of imperfection of a hybrid pixel sensor for X-ray detection with a circuit for charge sharing cancellation implemented
摘要： A developing trend in the design of event-driven sensors for X-ray detection are hybrid pixel detectors working in the single photon counting mode. The factors limiting detector performance, especially for small pixel sizes, include among others, mismatch of circuit components due to process variations, electronic noise and charge sharing. Charge sharing in a hybrid pixel detector occurs when the charge generated in X-ray photon interaction with a sensor is collected by more than one pixel. Charge sharing effect may significantly impair the detector energy resolution and result in counting extra events or missing some of the events. The impact of the charge sharing increases with a decrease of the pixel sizes. The small pixel size is a desired feature of a novel hybrid X-ray detector, as it allows better spatial resolution and helps to overcome the high count rate limits by accepting more photons per unit area. Therefore, the charge sharing effect must be dealt with by a dedicated readout IC or processed off-chip. Minimization of the analog parameters dispersion in the pixel matrix is crucial for the circuits designed for charge sharing cancellation. The chip’s sensitivity to the analog parameters spread and mitigation of the performance achieved with the digital correction blocks are studied. The DC offsets and gains spread can be optimized using correction circuits and dedicated trimming algorithms. Detection efficiency in case of charge sharing for the corrected and uncorrected pixel matrix is addressed. The simulation results as well as pencil beam measurements using synchrotron radiation are presented.
关键词： Front-end electronics for detector readout,Analogue electronic circuits,Digital electronic circuits
更新于2025-09-23 15:23:52
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Evaluation of the optical cross talk level in the SiPMs adopted in ASTRI SST-2M Cherenkov Camera using EASIROC front-end electronics
摘要： ASTRI (Astrofisica con Specchi a Tecnologia Replicante Italiana), is a flagship project of the Italian Ministry of Education, University and Research whose main goal is the design and construction of an end-to-end prototype of the Small Size of Telescopes of the Cherenkov Telescope Array. The prototype, named ASTRI SST-2M, will adopt a wide field dual mirror optical system in a Schwarzschild-Couder configuration to explore the VHE range of the electromagnetic spectrum. The camera at the focal plane is based on Silicon Photo-Multipliers detectors which is an innovative solution for the detection astronomical Cherenkov light. This contribution reports some preliminary results on the evaluation of the optical cross talk level among the SiPM pixels foreseen for the ASTRI SST-2M camera.
关键词： Front-end electronics for detector readout,Gamma detectors,Cherenkov detectors,Gamma telescopes
更新于2025-09-23 15:23:52
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Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data
摘要： The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified.
关键词： Front-end electronics for detector readout,Simulation methods and programs,Pixelated detectors and associated VLSI electronics
更新于2025-09-23 15:22:29
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The CMS Beam Halo Monitor electronics
摘要： The CMS Beam Halo Monitor has been successfully installed in the CMS cavern in LHC Long Shutdown 1 for measuring the machine induced background for LHC Run II. The system is based on 40 detector units composed of synthetic quartz Cherenkov radiators coupled to fast photomultiplier tubes (PMTs). The readout electronics chain uses many components developed for the Phase 1 upgrade to the CMS Hadronic Calorimeter electronics, with dedicated firmware and readout adapted to the beam monitoring requirements. The PMT signal is digitized by a charge integrating ASIC (QIE10), providing both the signal rise time, with few nanosecond resolution, and the charge integrated over one bunch crossing. The backend electronics uses microTCA technology and receives data via a high-speed 5 Gbps asynchronous link. It records histograms with sub-bunch crossing timing resolution and is read out via IPbus using the newly designed CMS data acquisition for non-event based data. The data is processed in real time and published to CMS and the LHC, providing online feedback on the beam quality. A dedicated calibration monitoring system has been designed to generate short triggered pulses of light to monitor the efficiency of the system. The electronics has been in operation since the first LHC beams of Run II and has served as the first demonstration of the new QIE10, Microsemi Igloo2 FPGA and high-speed 5 Gbps link with LHC data.
关键词： Cherenkov and transition radiation,Front-end electronics for detector readout,Beam-line instrumentation (beam position and profile monitors; beam-intensity monitors; bunch length monitors)
更新于2025-09-23 15:22:29
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LOCx2-130, a low-power, low-latency, 2 × 4.8-Gbps serializer ASIC for detector front-end readout
摘要： In this paper, we present the design and test results of LOCx2-130, a low-power, low-latency, dual-channel transmitter ASIC for detector front-end readout. LOCx2-130 has two channels of encoders and serializers, and each channel operates at 4.8 Gbps. LOCx2-130 can interface with three types of ADCs, an ASIC ADC and two COTS ADCs. LOCx2-130 is fabricated in a commercial 130-nm CMOS technology and is packaged in a 100-pin QFN package. LOCx2-130 consumes 440 mW and achieves a latency of less than 40.7 ns.
关键词： Trigger concepts and systems (hardware and software),Digital electronic circuits,Front-end electronics for detector readout
更新于2025-09-23 15:21:01
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Front-end electronics of the Compact High Energy Camera
摘要： The Compact High Energy Camera (CHEC) is an ultra-sensitive single-photon counting camera being developed to image Cherenkov light flashes, peak λ ≈ 400 nm, generated during gamma-ray initiated particle showers. CHEC-S is the second prototype version camera and uses silicon photomultiplier (SiPM) pixels whereas CHEC-M, the first prototype, is based on multi-anode photomultipliers. The development and characterisation of CHEC-M, in the laboratory and on-telescope, validated the CHEC concept [1] and enabled several technical improvements to contribute to a new design. CHEC-S is currently undergoing full characterisation with on-telescope observations being planned for spring 2019. This article describes the new Front-End Electronics (FEE) modules developed and optimised to instrument imaging air Cherenkov telescope cameras equipped with SiPM photodetectors.
关键词： Full-waveform readout,Silicon photomultipliers,CHEC,CTA,Front-end electronics,TARGET,Readout,SST-2M
更新于2025-09-19 17:15:36