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[IEEE 2018 Iranian Conference on Electrical Engineering (ICEE) - Mashhad (2018.5.8-2018.5.10)] Electrical Engineering (ICEE), Iranian Conference on - A New 10 Gb/s Optical Receiver Using Active Inductor in 90 nm CMOS Technology
摘要： This paper presents the design of a new low-power 10 Gb/s CMOS optical receiver in 90nm consisting of a transimpedance amplifier and two stages of a limiting amplifier. The transimpedance amplifier consists of two stages, and has a transimpedance gain of 54.8 dB(cid:159) and -3 dB bandwidth of 8 GHz for 0.15 pF input capacitance while dissipating 4.64 mW. The two-stage limiting amplifier employs a differential topology with active feedback. The complete optical receiver has a gain of 82.6 dB(cid:159), bandwidth of 8 GHz and consumes 13.64 mW from a 1-V supply.
关键词： low power,optical receiver,limiting amplifier,CMOS,transimpedance amplifier
更新于2025-09-23 15:21:21
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[IEEE 2019 International Conference on Artificial Intelligence and Advanced Manufacturing (AIAM) - Dublin, Ireland (2019.10.16-2019.10.18)] 2019 International Conference on Artificial Intelligence and Advanced Manufacturing (AIAM) - A Dynamic Real-Time Three-Dimensional Attitude Reconstruction Method Based on Multi-Core Optical Fiber Subtitle as Needed
摘要： We have developed a 5 × 5 mm2 compact silicon-photonic receiver with a 28-nm CMOS transimpedance-amplifier (TIA) chip. The receiver chip was designed using a photonics—electronics convergence design technique for the realization of high-speed and high-efficiency operation because the interfaces of the optical and electrical components greatly influence the receiver characteristics. Optical pins were used to obtain easy optical alignment between the multimode fibers and the germanium photodetectors. An aluminum stripline between the PD and the TIA enhanced the 3-dB bandwidth because its characteristic impedance is greater than the TIA input impedance. Coplanar waveguides (CPWs) on the etched SOI wafer achieved a low insertion loss because the overlap between the electric fields of the CPWs and the silicon layer was reduced. We demonstrated 25-Gb/s error-free operation at both 25 and at 85 °C. The minimum sensitivities and power consumptions of the receivers were ?11.0 dBm and 2.3 mW/Gb/s at 25 °C and ?10.2 dBm and 2.5 mW/Gb/s at 85 °C, respectively. These results show that our receiver can be applied for practical use at high temperatures.
关键词： CMOS transimpedance amplifier,multimode fiber transmission,optoelectronic integrated circuit,optical interconnections,optical receivers,silicon photonics
更新于2025-09-23 15:19:57
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[IEEE 2019 Compound Semiconductor Week (CSW) - Nara, Japan (2019.5.19-2019.5.23)] 2019 Compound Semiconductor Week (CSW) - Smart Stack Technology for III-V/Si Multi-Junction Solar Cells
摘要： We have developed a 5 × 5 mm2 compact silicon-photonic receiver with a 28-nm CMOS transimpedance-amplifier (TIA) chip. The receiver chip was designed using a photonics—electronics convergence design technique for the realization of high-speed and high-efficiency operation because the interfaces of the optical and electrical components greatly influence the receiver characteristics. Optical pins were used to obtain easy optical alignment between the multimode fibers and the germanium photodetectors. An aluminum stripline between the PD and the TIA enhanced the 3-dB bandwidth because its characteristic impedance is greater than the TIA input impedance. Coplanar waveguides (CPWs) on the etched SOI wafer achieved a low insertion loss because the overlap between the electric fields of the CPWs and the silicon layer was reduced. We demonstrated 25-Gb/s error-free operation at both 25 and at 85 °C. The minimum sensitivities and power consumptions of the receivers were ?11.0 dBm and 2.3 mW/Gb/s at 25 °C and ?10.2 dBm and 2.5 mW/Gb/s at 85 °C, respectively. These results show that our receiver can be applied for practical use at high temperatures.
关键词： optoelectronic integrated circuit,silicon photonics,optical interconnections,CMOS transimpedance amplifier,optical receivers,multimode fiber transmission
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Spectral Impacts on the Performance of mc-Si and New-Generation CdTe Photovoltaics in the Brazilian Northeast
摘要： We have developed a 5 × 5 mm2 compact silicon-photonic receiver with a 28-nm CMOS transimpedance-amplifier (TIA) chip. The receiver chip was designed using a photonics—electronics convergence design technique for the realization of high-speed and high-efficiency operation because the interfaces of the optical and electrical components greatly influence the receiver characteristics. Optical pins were used to obtain easy optical alignment between the multimode fibers and the germanium photodetectors. An aluminum stripline between the PD and the TIA enhanced the 3-dB bandwidth because its characteristic impedance is greater than the TIA input impedance. Coplanar waveguides (CPWs) on the etched SOI wafer achieved a low insertion loss because the overlap between the electric fields of the CPWs and the silicon layer was reduced. We demonstrated 25-Gb/s error-free operation at both 25 and at 85 °C. The minimum sensitivities and power consumptions of the receivers were ?11.0 dBm and 2.3 mW/Gb/s at 25 °C and ?10.2 dBm and 2.5 mW/Gb/s at 85 °C, respectively. These results show that our receiver can be applied for practical use at high temperatures.
关键词： optoelectronic integrated circuit,silicon photonics,optical interconnections,CMOS transimpedance amplifier,optical receivers,multimode fiber transmission
更新于2025-09-19 17:13:59