- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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Design and implementation of reconfigurable MPPT fuzzy controller for photovoltaic systems
摘要： Since, photovoltaic (PV) systems are currently very expensive, many scientific studies are being conducted to maximize the power such systems deliver. The best solution suggested so far consists of integrating the Maximum Power Point Tracking (MPPT) with the PV power systems. The present paper proposes to use the fuzzy logic technique in the actual implementation of the MPPT controller. The system includes a photovoltaic panel, a boost converter and an fuzzy logic controller. This system is designed, executed and tested under variable environmental constraints and using several technologies. A comparison between these different technologies is made. The findings of the experiments demonstrate an efficient operation of the FPGA-based PV system.
关键词： MPPT,Photovoltaic,Fuzzy logic,FPGA,Design
更新于2025-09-11 14:15:04
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Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing
摘要： The design and hardware implementation of a low-complexity signal processing algorithm is proposed for real-time depth-velocity ?ltering in 5-D light ?eld videos (LFVs). The proposed design is based on a stable 5-D in?nite impulse response (IIR) digital ?lter having three cascaded sections, each synthesized using the concept of multidimensional passive network resonance. A novel semi-systolic hardware implementation is proposed. Each section of the ?lter is implemented and tested on a Xilinx Virtex-7 FPGA platform using Matlab based hardware co-simulation with both synthetic and real LFV signals. A real-time processing throughput of 467 LFV frames/s is implied with each section of the ?lter operating at 204, 164 and 115 MHz for input LFV frames of size 9×9×220×360.
关键词： FPGA,depth-velocity ?lters,Light ?eld videos
更新于2025-09-11 14:15:04
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[IEEE IGARSS 2018 - 2018 IEEE International Geoscience and Remote Sensing Symposium - Valencia (2018.7.22-2018.7.27)] IGARSS 2018 - 2018 IEEE International Geoscience and Remote Sensing Symposium - FPGA Based Implementation of Convolutional Neural Network for Hyperspectral Classification
摘要： convolutional neural network (CNN) has been widely used for hyperspectral classification. Current researches of CNN based hyperspectral image classification is mainly implemented on graphics processing unit (GPU) platform. However, GPU is not suitable for onboard processing due to the problem of space radiation and power supply on image acquiring platform. Therefore, in this paper, FPGA is selected to implement CNN based hyperspectral classification for further onboard processing. Specially, a hardware model is designed for the forward classification step of CNN using hardware description language, including computation structure for CNN, implementation of different layers, weight loading scheme, and data interfere. Simulation results over Pavia dataset validate the proposed FPGA based implementation is coincide with that on GPU platform.
关键词： classification,FPGA,hyperspectral,Convolutional neural network
更新于2025-09-10 09:29:36
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Real-time signal processing for sub-THz range grating-based distributed fiber sensing
摘要： Distributed optical fiber sensors are an increasingly utilized method of gathering distributed strain and temperature data. However, the large amount of data they generate presents a challenge that limits their use in real-time, in situ applications. This article describes a parallel and pipelined computing architecture that accelerates the signal-processing speed of sub-terahertz fiber sensor arrays, maintaining high spatial resolution while allowing for expanded use of real-time sensing and control applications. The computing architecture described was successfully implemented in a field programmable gate array chip. The signal processing for the entire array takes only 12 system clock cycles. In addition, this design removes the necessity of storing any raw or intermediate data.
关键词： distributed optical fiber sensors,real-time signal processing,sub-THz range,FPGA,grating-based
更新于2025-09-10 09:29:36
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An Advanced 100-Channel Readout System for Nuclear Imaging
摘要： Reading out from large-scale silicon photomultiplier (SiPM) arrays is a fundamental technical obstacle blocking the application of revolutionary SiPM technologies in nuclear imaging systems. Typically, it requires using dedicated application-specific integrated circuits (ASICs) that need a long iterative process, special expertise, and tools to develop. The pico-positron emission tomography (Pico-PET) electronics system is an advanced 100-channel readout system based on 1-bit sigma–delta modulation and a field-programmable gate array (FPGA). It is compact (6 × 6 × 0.8 cm3 in size), consumes little power (less than 3W), and is constructed with off-the-shelf low-cost components. In experimental studies, the Pico-PET system demonstrates excellent and consistent performance. In addition, it has some unique features that are essential for nuclear imaging systems, such as its ability to measure V–I curves, breakdown voltages, and the dark currents of 100 SiPMs accurately, simultaneously, and in real time. The flexibility afforded by FPGAs allows multiple-channel clustering and intelligent triggering for different detector designs. These highly sought-after features are not offered by any other ASICs and electronics systems developed for nuclear imaging. We conclude that the Pico-PET electronics system provides a practical solution to the long-standing bottleneck problem that has limited the development of potentially advanced nuclear imaging technology using SiPMs.
关键词： silicon photomultiplier (SiPM),readout electronics,Field-programmable gate array (FPGA),nuclear imaging,sigma–delta modulation
更新于2025-09-10 09:29:36
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An FPGA-Based Backend System for Intravascular Photoacoustic and Ultrasound Imaging
摘要： The integration of intravascular ultrasound (IVUS) and intravascular photoacoustic (IVPA) imaging produces an imaging modality with high sensitivity and specificity which is particularly needed in interventional cardiology. Conventional side-looking IVUS imaging with a single-element ultrasound (US) transducer lacks forward-viewing capability, which limits the application of this imaging mode in intravascular intervention guidance, Doppler-based flow measurement, and visualization of nearly or totally blocked arteries. For both side-looking and forward-looking imaging, the necessity to mechanically scan the US transducer limits the imaging frame rate, and therefore array-based solutions are desired. In this paper, we present a low-cost, compact, high-speed, and programmable imaging system based on a field-programmable gate array (FPGA) suitable for dual-mode forward-looking IVUS/IVPA imaging. The system has 16 US transmit and receive channels and functions in multiple modes including interleaved photoacoustic (PA) and US imaging, hardware-based high-frame-rate US imaging, software-driven US imaging, and velocity measurement. The system is implemented in the register-transfer level, and the central system controller is implemented as a finite state machine. The system was tested with a capacitive micromachined ultrasonic transducer (CMUT) array. A 170-frames-per-second (FPS) US imaging frame rate is achieved in the hardware-based high-frame-rate US imaging mode while the interleaved PA and US imaging mode operates at a 60-FPS US and a laser-limited 20-FPS PA imaging frame rate. The performance of the system benefits from the flexibility and efficiency provided by low-level implementation. The resulting system provides a convenient backend platform for research and clinical IVPA and IVUS imaging.
关键词： software/hardware co-design,velocity measurement,ultrasound imaging,Photoacoustic imaging,FPGA,data acquisition,finite state machine
更新于2025-09-10 09:29:36
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Implementation of Real-Time Post-Processing for High-Quality Stereo Vision
摘要： We propose a novel post-processing algorithm and architecture that simultaneously uses the passive and active stereo vision information to improve the reliability of the three-dimensional disparity in a hybrid stereo vision system. The proposed architecture consists of four steps — left-right consistency checking, semi-2D hole filling, a tiny adaptive variance checking, and a 2D weighted median filter. The experimental results show that the error rate of the proposed algorithm (5.77%) is less than that of a raw disparity (10.12%) for a real-world camera image having a 1,280 × 720 resolution and maximum disparity of 256. Moreover, for the famous Middlebury stereo image sets, the proposed algorithm’s error rate (8.30%) is also less than that of the raw disparity (13.7%). The proposed architecture is implemented on a single commercial field-programmable gate array using only 13.01% of slice resources, which achieves a rate of 60 fps for 1,280 × 720 stereo images with a disparity range of 256.
关键词： post processing,hole filling,variance check,FPGA,weighted median filter,Stereo vision,3D depth
更新于2025-09-10 09:29:36
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The Design of Nonlinear Chirp Based on the DSP Builder Technique
摘要： This paper, by analyzing the function Chirp, studies the software design and realization of the function. It offers a design plan based on the nonlinear Chirp signal of DSP Builder technique and designs the signal generator of the nonlinear Chirp based on the design flow of Matlab/Simulink/DSP Builder/QuartusⅡ. It also conducts simulation verification using the development software Matlab/Simulink and QuartusII, proving that the design can well realize the signal source Chirp. The experiment proves that the DSP Builder technique can modify the starting frequency, bandwidth and the frequency resolution of linear frequency modulation signals by changing the programming parameters. The method is proved to be simple in designing, convenient in modification, low in cost and it doesn’t involve any programming; therefore, it is easy to realize.
关键词： FPGA,Matlab/Simulink,Nonlinear Chirp,DSP Builder,QuartusⅡ
更新于2025-09-10 09:29:36
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A scalable hardware and software control apparatus for experiments with hybrid quantum systems
摘要： Modern experiments with fundamental quantum systems — like ultracold atoms, trapped ions, and single photons — are managed by a control system formed by a number of input/output electronic channels governed by a computer. In hybrid quantum systems, where two or more quantum systems are combined and made to interact, establishing an efficient control system is particularly challenging due to the higher complexity, especially when each single quantum system is characterized by a different time scale. Here we present a new control apparatus specifically designed to efficiently manage hybrid quantum systems. The apparatus is formed by a network of fast communicating Field Programmable Gate Arrays (FPGAs), the action of which is administrated by a software. Both hardware and software share the same tree-like structure, which ensures a full scalability of the control apparatus. In the hardware, a master board acts on a number of slave boards, each of which is equipped with an FPGA that locally drives analog and digital input/output channels and radiofrequency outputs up to 400 MHz. The software is designed to be a general platform for managing both commercial and home-made instruments in a user-friendly and intuitive graphical user interface. The architecture ensures that complex control protocols can be carried out, such as performing of concurrent commands loops by acting on different channels, the generation of multi-variable error functions, and the implementation of self-optimization procedures. Although designed for managing experiments with hybrid quantum systems, in particular with atom-ion mixtures, this control apparatus can in principle be used in any experiment in atomic, molecular, and optical physics.
关键词： FPGA,scalable hardware,control system,software control,hybrid quantum systems
更新于2025-09-10 09:29:36
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[IEEE 2018 2nd International Conference on Trends in Electronics and Informatics (ICOEI) - Tirunelveli, India (2018.5.11-2018.5.12)] 2018 2nd International Conference on Trends in Electronics and Informatics (ICOEI) - FPGA Implementation of Gradient Based Edge Detection Algorithms for Real Time Image
摘要： In this paper a novel technique to implement gradient based edge detectors on FPGA platform is demonstrated. Three most popular gradient based edge detection algorithms viz. Sobel, Prewitt and Robert Cross are modelled in hardware description language and implemented on Terasic VEEK-MT FPGA development board. The RGB image is first transformed into gray scale using luminosity method which is fed to line buffers to apply appropriate edge detection mask. An edge detection processor block is designed wherein the relevant filter mask is applied followed by generation of horizontal and vertical gradient. The root mean square value of the two gradient components is compared against a user defined threshold before applying to the LCD module for display. The proposed implementation is tested on both still and video images. Implementation result endorses the successful design of gradient based edge detection algorithm on FPGA platform.
关键词： Sobel,image processing,Quartus-II,RGB image,FPGA,Robert Cross,Prewitt,edge detection
更新于2025-09-09 09:28:46