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oe1(光电查) - 科学论文

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  • [IEEE IGARSS 2018 - 2018 IEEE International Geoscience and Remote Sensing Symposium - Valencia (2018.7.22-2018.7.27)] IGARSS 2018 - 2018 IEEE International Geoscience and Remote Sensing Symposium - FPGA-Based Multi-core Reconfigurable System for SAR Imaging

    摘要: With the development of the very large scale integration circuit (VLSI), multi-core processors have been developing fast and provide a novel approach to meet the requirements of modern complex computing. Real-time SAR imaging is always a hard problem to deal with since the huge amount of data and complex processing. Therefore, we design a schedulable and scalable multi-core parallel architecture based on FPGA and map the fundamental Chirp Scaling algorithm to the system. The design of the master control core makes the system highly extensible and the dedicated computing cores are designed to accelerate the process. In addition, the system can meet the real-time requirements, and it performs well in the resource utilization and the FPGA chip takes up a small space as well.

    关键词: parallel architecture,multi-cores system,SAR imaging,FPGA

    更新于2025-09-09 09:28:46

  • [IEEE 2018 28th International Conference on Field Programmable Logic and Applications (FPL) - Dublin, Ireland (2018.8.27-2018.8.31)] 2018 28th International Conference on Field Programmable Logic and Applications (FPL) - ADAS and Video Surveillance Analytics System Using Deep Learning Algorithms on FPGA

    摘要: Deep learning algorithms, such as CNN (Convolutional Neural Network), could provide high accuracy for great number of applications including ADAS (Advanced Driver Assistance System) and video surveillance analytics. Considering processing speed and energy efficiency, FPGA is a good hardware to construct customized CNN solution. In this demo session, we want to benefit from hardware technology, and show a fast speed and accurate video analytics system using state-of-the-art deep learning algorithms running on low power FPGA. This system could process 16 channels of continuous input video with the resolution of 1080p. Two functionalities could be easily switched by just clicking a button in this live demo: one ADAS system for vehicle, non-motorized vehicle, and pedestrian detection, tracking, and attributes analytics; and the other video surveillance system for face detection and recognition. The deep learning algorithms used are SSD and densebox for two kinds of objects’ detection, which have state-of-the-art accuracy. The FPGA used is Xilinx MPSoC ZU9, and the whole board including this FPGA only cost about 50 Watts with Peak performance at 5.6 TOPS.

    关键词: video surveillance,deep learning,FPGA,ADAS

    更新于2025-09-09 09:28:46

  • Implementation of a modified SVPWM-based three-phase inverter with reduced switches using a single DC source for a grid-connected PV system

    摘要: Application of multilevel inverters has been an active research area in recent years due to their growing importance in various diversified electrical utilities. A three-phase inverter with a single DC source employing a three-phase transformer for a grid-connected photovoltaic (PV) system controlled using the modified space vector pulse width modulation technique (MSVPWM) for fifteen switches is presented in this paper. An MSVPWM technique is implemented through a field-programmable gate array (FPGA) and generates high quality gate pulses to the switches in the inverter. The main advantages of the proposed inverter topology are reduced number of power switches, transformers and minimum total harmonic distortion (THD). The perturb and observe maximum power point algorithm is used to obtain the maximum power from the PV panel at all climatic conditions. The performance of the proposed system is validated through MATLAB/Simulink as well as an FPGA-based prototype model.

    关键词: MSVPWM,Multilevel inverter (MLI),FPGA,PV,single DC source

    更新于2025-09-04 15:30:14

  • FPGA logic design method based on multi resolution image real time acquisition system

    摘要: Medical imaging techniques are mostly generated by human tissue echoes and received by the transducer which is converted to electrical signals, after amplification, extraction, processing, and then signals are converted by the digital scan converter for standard video signal, finally displayed by the display. We propose a scheme of real-time and multi resolution image acquisition system by FPGA control logic design based on the real-time data acquisition, beam forming, processing, acquisition and transmission to ARM embedded video signal processing system with high real-time requirements, so we choose FPGA and SRAM real-time acquisition system which can meet the above requirements in speed and capacity. According to the problems encountered in the process of high speed acquisition, a reasonable timing optimization and RTL level synthesis is designed. The experimental results show that the design and implementation of the image acquisition system is not only stable, but also significantly improve the overall performance of the image processing system.

    关键词: SRAM,FPGA,RTL level synthesis,Medical imaging techniques

    更新于2025-09-04 15:30:14

  • Image-Forming System Design of Dynamic Targets Based on Reflecting Mirror Splicing

    摘要: In this paper, the author designed an area-scan CCD reflecting mirror splicing image-forming system with area-scan CCD ICX415AL as its transducer module and this system can be used for tracking dynamic targets. By analyzing the theory of vignetting generating, the author made mathematic model of vignetting and confirmed the splicing and overlapping pixel number of the optical system. What’s more, the sequential circuit and driving power circuit of ICX415ALwas designed and the correlated noise in video signals was strained with CDS technology. Therefore, the signal-to-noise ratio (SNR) of the system was elevated. With FPGA as its core controlling module, this system postponed the splicing image-forming system to a period during which a line of CCD data are read, thus the need of real-time tracking was completely met.

    关键词: dynamic targets,FPGA,area-scan CCD,reflecting mirror

    更新于2025-09-04 15:30:14

  • ChipNet: Real-Time LiDAR Processing for Drivable Region Segmentation on an FPGA

    摘要: This paper presents a field-programmable gate array (FPGA) design of a segmentation algorithm based on convolutional neural network (CNN) that can process light detection and ranging (LiDAR) data in real-time. For autonomous vehicles, drivable region segmentation is an essential step that sets up the static constraints for planning tasks. Traditional drivable region segmentation algorithms are mostly developed on camera data, so their performance is susceptible to the light conditions and the qualities of road markings. LiDAR sensors can obtain the 3D geometry information of the vehicle surroundings with high precision. However, it is a computational challenge to process a large amount of LiDAR data in real-time. In this paper, a CNN model is proposed and trained to perform semantic segmentation using data from the LiDAR sensor. An efficient hardware architecture is proposed and implemented on an FPGA that can process each LiDAR scan in 17.59 ms, which is much faster than the previous works. Evaluated using Ford and KITTI road detection benchmarks, the proposed solution achieves both high accuracy in performance and real-time processing in speed.

    关键词: Autonomous vehicle,LiDAR,FPGA,road segmentation,CNN

    更新于2025-09-04 15:30:14