修车大队一品楼qm论坛51一品茶楼论坛,栖凤楼品茶全国楼凤app软件 ,栖凤阁全国论坛入口,广州百花丛bhc论坛杭州百花坊妃子阁

oe1(光电查) - 科学论文

7 条数据
?? 中文(中国)
  • Investigation of Trap-Induced Threshold Voltage Instability in GaN-on-Si MISHEMTs

    摘要: It is shown that an EC–0.90 eV trap in commercial AlGaN/GaN MISHEMTs grown on a Si (111) substrate is responsible for a ?1.8-V threshold voltage (VT) instability using a combination of defect spectroscopy and double-pulsed current–voltage measurements. The EC ? 0.90 eV trap is located in the GaN buffer and is emptied by high drain biases in pinch-off, which raises the trap above the Fermi level in the GaN buffer. This trap also exhibits both fast and slow recovery processes that are explained by the availability of free electrons throughout the depth of the GaN buffer and the trapping process that depletes the free electron concentration. TCAD modeling is used to demonstrate this process and also to show why there is not a significant increase in buffer leakage current after the large negative VT shift due to this trap. This demonstrates that optimizing buffer designs are critical for ideal device performance.

    关键词: deep-level transient spectroscopy (DLTS),isothermal,GaN-on-Si,threshold voltage instability,metal-insulator-semiconductor high electron mobility transistors (MISHEMTs),Capture process,trap

    更新于2025-09-23 15:22:29

  • Fully-vertical GaN-on-Si power MOSFETs

    摘要: We report the first demonstration of fully-vertical power MOSFETs on 6.6-μm-thick GaN grown on a 6-inch Si substrate by metal-organic chemical vapor deposition (MOCVD). A robust fabrication method was developed based on a selective and local removal of the Si substrate as well as the resistive GaN buffer layers, followed by a conformal deposition of a 35-μm-thick copper layer on the backside by electroplating, which provides excellent mechanical stability and electrical contact to the drain terminal. The fabrication process of the gate trench was optimized, improving considerably the effective mobility at the p-GaN channel and the output current of the devices. High performance fully-vertical GaN-on-Si MOSFETs are presented, with low specific on-resistance (Ron,sp) of 5 m?cm2 and high off-state breakdown voltage (BV) of 520 V. Our results reveal a major step towards the realization of high performance GaN vertical power devices on cost-effective Si substrates.

    关键词: power devices,GaN,low Ron,sp,GaN-on-Si,fully-vertical,MOSFETs,vertical,high breakdown

    更新于2025-09-19 17:15:36

  • Thermal Management of GaN-on-Si High Electron Mobility Transistor by Copper Filled Micro-Trench Structure

    摘要: Self-heating effect is a major limitation in achieving the full performance potential of high power GaN power devices. In this work, we reported a micro-trench structure fabricated on the silicon substrate of an AlGaN/GaN high electron mobility transistor (HEMT) via deep reactive ion etching, which was subsequently filled with high thermal conductive material, copper using the electroplating process. From the current-voltage characteristics, the saturation drain current was improved by approximately 17% with the copper filled micro-trench structure due to efficient heat dissipation. The iDS difference between the pulse and DC bias measurement was about 21% at high bias VDS due to the self-heating effect. In contrast, the difference was reduced to approximately 8% for the devices with the implementation of the proposed structure. Using Micro-Raman thermometry, we showed that temperature near the drain edge of the channel can be lowered by approximately ~22 °C in a HEMT operating at ~10.6 Wmm?1 after the implementation of the trench structure. An effective method for the improvement of thermal management to enhance the performance of GaN-on-Silicon HEMTs was demonstrated.

    关键词: thermal management,high electron mobility transistor,self-heating effect,copper filled micro-trench,GaN-on-Si

    更新于2025-09-16 10:30:52

  • 55.1: <i>Invited Paper:</i> Achieving high uniformity of 200 mm GaN‐on‐Si LED epiwafers for micro LED applications

    摘要: One of the big challenges of micro LED displays is to reduce cost/increase yield and establish excellent manufacturability. Galliumnitride on silicon (GaN-on-Si) LED epiwafers offer fundamental cost advantages to the entire process flow for micro LEDs compared with conventional GaN-on-sapphire LED epiwafers. However, due to the difficulties of epitaxial growth of GaN-on-Si, demonstration of such cost advantages in micro LED application is not wide-spread yet. In this presentation, we have demonstrated excellent emission uniformity with well- controlled strain by precise strain-engineering. This opens the way to use the advantages of GaN-on-Si LED epiwafers in the entire supply chain of micro LED making and thus reduce cost significantly and enable high yield manufacturing.

    关键词: curvature,GaN-on-Si,200 mm epiwafer,reproducibility,micro LED,emission wavelength uniformity,strain-engineering

    更新于2025-09-11 14:15:04

  • Deeply-scaled GaN-on-Si high electron mobility transistors with record cut-off frequency <i>f</i><sub>T</sub> of 310 GHz

    摘要: A deeply-scaled GaN-on-Si high electron mobility transistor (HEMT) with a record-high cut-off frequency (fT) of 310 GHz has been demonstrated. The device has an InAlN/GaN heterojunction structure, a source-drain spacing of 400 nm, and a gate length of 40 nm. The device exhibited a high drain current of 2.34 A/mm, a peak transconductance of 523 mS/mm, and a gate-to-drain breakdown voltage (BVgd) of 15 V. A Johnson’s figure-of-merit (FOM = fT × BV) of 4.65 THz·V has been achieved, which is comparable to those reported in GaN-on-SiC. These results indicate GaN-on-Si transistors are promising in low-cost emerging mm-wave applications.

    关键词: mm-wave applications,GaN-on-Si,HEMT,high electron mobility transistor,cut-off frequency

    更新于2025-09-11 14:15:04

  • On the Origin of the Coss-Losses in Soft-Switching GaN-on-Si Power HEMTs

    摘要: The unprecedented performance potential of Gallium-Nitride-on-Silicon (GaN-on-Si) High Electron Mobility Transistors (HEMTs) is seen as the key enabler for the design of power converters featuring extreme power-density figures, as demanded in next generation power electronics applications. However, unexpected loss mechanisms, i.e. dynamic Rds,on phenomena and Coss-losses, are appearing in currently available GaN transistors and are compromising their operation. In this paper, measurements of Coss-losses are performed in a dedicated calorimetric measurement setup and, through a systematic approach, the root cause of the loss mechanism is potentially identified. Afterwards, with the essential support of a manufacturer of power semiconductors, a novel transistor, featuring an enhanced multi-layer III-N buffer, is developed according to the acquired knowledge. A significant reduction in terms of Coss-losses, i.e. of soft-switching losses, and the absence of dynamic Rds,on phenomena are verified experimentally on the new device. These achievements enable a significant performance improvement for future soft-switching power converters featuring GaN-on-Si HEMTs.

    关键词: Soft-Switching Losses,Calorimetric Loss Measurements,Coss-Losses,GaN-on-Si HEMTs

    更新于2025-09-09 09:28:46

  • [IEEE 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Atlanta, GA, USA (2018.10.31-2018.11.2)] 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) - Substrate Bias Effect on E-Mode GaN-on-Si HEMT Cos<inf>s</inf> Losses

    摘要: Previous work found large COSS losses in GaN-on-Si HEMTs used in soft-switched, MHz-frequency power converters. Here, we use a back-gate bias between the source and Si substrate to investigate the capacitance characteristics of commercially-available GaN HEMTs. The small-signal capacitance is reduced significantly – up to 2× for a 650 V HEMT and 4× for a 100 V HEMT – indicating that the drain-substrate capacitance is a significant portion of the total output capacitance. This portion of the capacitance appears responsible for trapping-detrapping with time constants on the order of seconds. We verify this by testing the 100 V GaN HEMT in the Sawyer-Tower circuit with negative substrate bias, finding that COSS losses are reduced by up to 30% compared to the shorted substrate condition.

    关键词: Sawyer-Tower circuit,COSS losses,capacitance characteristics,GaN-on-Si HEMTs,substrate bias

    更新于2025-09-04 15:30:14