研究目的
Investigating the use of phase-change memory (PCM) cells with integrated FET access devices for accumulation-based computation and demonstrating efficient factorization.
研究成果
The study demonstrates that CMOS-integrated PCM memory cells with FET access devices can perform arithmetic operations using an accumulator-based computational scheme. The intermediate states between pulses are stable for up to at least an hour, enabling a form of non-von Neumann computing where computation and data storage occur in the same physical location. Future work could improve the scheme's reliability and reduce power consumption by scaling to smaller devices.
研究不足
The reliability of the accumulation scheme decreases for higher arithmetic bases. No specific steps were taken to optimize the performance of the accumulation-based computational scheme, indicating potential for improvement in future work.
1：Experimental Design and Method Selection:
The study involves using PCM cells with integrated FET access devices to explore accumulation-based computation. The methodology includes applying electrical pulses to PCM cells to observe their switching behavior and accumulation properties.
2：Sample Selection and Data Sources:
The experiments use 'mushroom'-type PCM cells fabricated in the 90-nm technology node.
3：List of Experimental Equipment and Materials:
PCM cells with FET access devices, electrical pulse generators for RESET and excitation pulses.
4：Experimental Procedures and Operational Workflow:
The PCM cell is initially RESET using fast, high-amplitude pulses. It is then excited with identical pulses until the cell resistance drops below a predetermined decision-level value. The number of pulses required is recorded.
5：Data Analysis Methods:
The effect of excitation pulse amplitude and RESET pulse characteristics on the accumulation properties is analyzed. The stability of intermediate states is also investigated.
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