研究目的
Investigating the design and implementation of an ultra-low power (ULP) Bluetooth Low Energy (BLE) transmitter that demonstrates high system efficiency and phase purity while adhering to strict 28 nm CMOS technology manufacturing rules.
研究成果
The proposed ULP BLE transmitter achieves the best-ever reported system efficiency and phase purity, operating within the strict 28 nm CMOS technology manufacturing rules. It demonstrates significant improvements in power consumption and efficiency compared to prior works, making it suitable for IoT applications.
研究不足
The study is limited by the constraints of 28 nm CMOS technology manufacturing rules and the challenges of achieving high efficiency and phase purity in ULP transmitters. Potential areas for optimization include further reducing power consumption and improving the phase noise performance.
1：Experimental Design and Method Selection:
The study introduces a new transmitter architecture for ULP radios, focusing on reducing the supply voltage and power of energy-hungry RF circuits without compromising performance. It employs an all-digital PLL with a digitally controlled oscillator and a switching power amplifier operating in class-E/F
2：Sample Selection and Data Sources:
The transmitter is realized in 28 nm digital CMOS, adhering to all metal density and manufacturing rules.
3：List of Experimental Equipment and Materials:
The design utilizes a digitally controlled oscillator with switching current sources and a class-E/F2 power amplifier integrated with its matching network.
4：Experimental Procedures and Operational Workflow:
The methodology involves designing and testing the transmitter's architecture, focusing on efficiency and phase purity, and measuring its performance in terms of power consumption and RF power delivery.
5：Data Analysis Methods:
The performance is evaluated based on phase noise, power consumption, and system efficiency, with comparisons to state-of-the-art ULP transmitters.
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