研究目的
To develop a high-resolution AMOLED backplane using vertically integrated, double stack oxide TFT layers for applications in augmented reality (AR), virtual reality (VR), and mixed or merged reality (MR) technologies.
研究成果
The developed vertically integrated, double stack oxide TFT backplane demonstrates high performance and stability, suitable for high-resolution AMOLED displays. The integration of a fine-pitch, high-speed gate driver further enhances its applicability in AR/VR technologies.
研究不足
The study focuses on the fabrication and performance of TFTs on glass substrates, and the scalability to flexible substrates or large-area displays is not addressed. The impact of further miniaturization on TFT performance and reliability is also not explored.
1：Experimental Design and Method Selection:
The study involves the fabrication of vertically integrated, double stack oxide TFTs using an inverted staggered structure. The first TFT layer is designed in bulk-accumulation mode, and the second TFT layer features a single gate with back-channel etched structure.
2：Sample Selection and Data Sources:
The samples are fabricated on glass substrates, with Mo layers used for metal data lines and gate electrodes, and a-IGZO as the semiconductor material.
3：List of Experimental Equipment and Materials:
Equipment includes a sputtering system for Mo layer deposition, PECVD for SiO2 and SiNx deposition, and an Agilent 4156 C semiconductor parameter analyzer for electrical measurements. Materials include Mo, SiO2, SiNx, and a-IGZO.
4：Experimental Procedures and Operational Workflow:
The process involves deposition and patterning of Mo layers, deposition of gate dielectrics and a-IGZO, formation of source/drain electrodes, and annealing. Electrical measurements are conducted to evaluate TFT performance.
5：Data Analysis Methods:
The threshold voltage, field-effect mobility, and subthreshold swing are derived from the electrical measurements to assess TFT performance.
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