研究目的

To implement techniques and systems for electrical measurements at nano and micro scales for the characterization of copper filled Thru Silicon Vias (TSVs) used in 3D integrated circuits interconnects and for defect detection in such vias.

研究成果

Three different techniques using local electrical measurements, both at micro and nanoscale and setups are implemented in order to detect and characterize structural defects in copper filled TSV interconnects of 3D SICs. Preliminary results have been presented using a microscale four-probe system and a scanning microwave microscope.

研究不足

The main uncertainty comes from the measurement of the positioning of the probes (1 μm), due mainly to the limitations of the optical components. For SMM, the positioning of the voids in the TSVs available were deeper than 3 μm which makes their detection difficult even impossible considering the lowest possible frequency (0.92 GHz) and the corresponding skin depth in copper with the present system implementation.