1：Experimental Design and Method Selection:

The study employed a pulse-frequency modulation (PFM) analog-to-digital converter (ADC) as a digital pixel to overcome signal saturation due to the full well capacity of the photodiode (PD). A newly designed PFM-ADC for pixels with a pinned PD and a floating diffusion was used to comply with the CMOS image sensor process for high sensitivity and low noise.

2：Sample Selection and Data Sources:

The sensor was fabricated using 0.18- and 0.2-μm process nodes, integrating PDs, comparators, logic circuits, and counters into two silicon-on-insulator layers.

3：18- and 2-μm process nodes, integrating PDs, comparators, logic circuits, and counters into two silicon-on-insulator layers. List of Experimental Equipment and Materials:

3. List of Experimental Equipment and Materials: The sensor chip was developed with gold interconnection electrodes of 5 μm diameter, achieving a QVGA resolution within a 20-mm square chip.

4：Experimental Procedures and Operational Workflow:

The sensor's performance was evaluated by measuring its output against input illuminance, confirming excellent linearity and a wide-dynamic range of more than 96 dB.

5：Data Analysis Methods:

The sensor's capability was demonstrated by capturing video images with a high bit depth of 16 bit, showing superior image sensing.