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- 2018
- contrast stretch
- CMOS image sensor
- point-of-care (POC) diagnosis
- bio-microfluidic imaging
- Optoelectronic Information Science and Engineering
- Xi’an University of Technology
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Monolithic Wafer Scale Integration of Silicon Nanoribbon Sensors with CMOS for Lab-on-Chip Application
摘要: Silicon ribbons (SiRi) have been well-established as highly sensitive transducers for biosensing applications thanks to their high surface to volume ratio. However, selective and multiplexed detection of biomarkers remains a challenge. Further, very few attempts have been made to integrate SiRi with complementary-metal-oxide-semiconductor (CMOS) circuits to form a complete lab-on-chip (LOC). Integration of SiRi with CMOS will facilitate real time detection of the output signal and provide a compact small sized LOC. Here, we propose a novel pixel based SiRi device monolithically integrated with CMOS ?eld-effect-transistors (FET) for real-time selective multiplexed detection. The SiRi pixels are fabricated on a silicon-on-insulator wafer using a top-down method. Each pixel houses a control FET, ?uid-gate (FG) and SiRi sensor. The pixel is controlled by simultaneously applying frontgate (VG) and backgate voltage (VBG). The liquid potential can be monitored using the FG. We report the transfer characteristics (ID-VG) of N- and P-type SiRi pixels. Further, the ID-VG characteristics of the SiRis are studied at different VBG. The application of VBG to turn ON the SiRi modulates the subthreshold slope (SS) and threshold voltage (VTH) of the control FET. Particularly, N-type pixels cannot be turned OFF due to the control NFET operating in the strong inversion regime. This is due to large VBG (≥25 V) application to turn ON the SiRi sensor. Conversely, the P-type SiRi sensors do not require large VBG to switch ON. Thus, P-type pixels exhibit excellent ION/IOFF ≥ 106, SS of 70–80 mV/dec and VTH of 0.5 V. These promising results will empower the large-scale cost-ef?cient production of SiRi based LOC sensors.
关键词: silicon ribbon biosensor,SiRi backgate mode,silicon ribbon pixel,selective multiplexed detection,SiRi CMOS integration,SiRi frontgate mode,lab-on-chip
更新于2025-09-23 15:22:29
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Area-Efficient Analog FIR Filter for Multi-Level Optical Transmission; 多値光伝送歪み補償に用いる小面積アナログFIRフィルタ;
摘要: The transmission of waveforms through optical fiber usually results in some waveform distortion. To smoothen this distortion, digital finite-impulse response (FIR) filters are commonly employed. Digital FIR filters require a relatively large area for digital signal processing (DSP) on IC chip, so an analog FIR filter is adopted. According to past researches, it is possible to realize a small area circuit by using a CMOS inverter as a delay circuit. However, number of delay circuits employing CMOS inverter increases N/2 for Multi-Level optical transmission. Therefore, we propose a new multiplier and attempted to reduce the circuit area of 4 PAM analog FIR filter. According to the estimation using SPICE simulation, it can be expected to reduce the area by 25% by using the proposed configuration.
关键词: analog FIR filter,CMOS inverter,gilbert cell,multi-level,28 nm FDSOI,optical transmission
更新于2025-09-23 15:22:29
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A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications
摘要: A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of ?93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 μs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/μs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/μs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.
关键词: FMCW radar,fractional-N,two-point modulation,CMOS,phase locked loop,frequency synthesizer
更新于2025-09-23 15:22:29
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Improvement of photogrammetric accuracy by modeling and correcting the thermal effect on camera calibration
摘要: This paper presents a new method for improving the geometric accuracy of photogrammetric reconstruction by modeling and correcting the thermal effect on camera image sensor. The objective is to verify that when the temperature of image sensor varies during the acquisition, image deformation induced by the temperature change is quantifiable, modelisable and correctable. A temperature sensor integrated in the camera enables the measurement of image sensor temperature at exposure. It is therefore natural and appropriate to take this effect into account and to finally model and correct it after a calibration step. Nowadays, in cartography applications performed with UAV, the frame rate of acquisitions is continuously increasing. A high frame rate over a long acquisition time can result in an important temperature increase of the image sensor and thus introduces image deformations. The correction of the above-mentioned effect can improve the measurement accuracy. We present three methods to calibrate the thermal effect and experiments on two datasets are carried out to verify the improvement in terms of the photogrammetric accuracy.
关键词: Metrology,Photogrammetry,CMOS,Thermal deformation
更新于2025-09-23 15:22:29
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Radiation tolerance characterization of Geiger-mode CMOS avalanche diodes for a dual-layer particle detector
摘要: An array of Single Photon Avalanche Diodes (SPAD), fabricated in a 180 nm CMOS technology featuring a high voltage (HV) option, has been investigated in terms of radiation tolerance, in view of the design of low material budget dual-tier detectors for charged particle tracking based on the coincidence of signals coming from pairs of vertically aligned pixels. Each pixel in the array includes both the processing electronics and the sensing element in a monolithic structure. The test vehicles were irradiated with 10 keV X-rays up to a dose of 1 Mrad (SiO2) and with neutrons up to a fluence of 1011 n_eq cm?2. A selection of the characterization results are presented together with the main features of a new large scale SPAD array to be fabricated in a 150 nm CMOS technology and ready for vertical interconnection in a dual layer structure.
关键词: Pixelated sensor,CMOS,Single Photon Avalanche Diode,Radiation tolerance,Tracking detectors
更新于2025-09-23 15:22:29
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A Switching Sequence for Unary Digital-to-Analog Converters Based on a Knight's Tour
摘要: This paper proposes a new switching sequence with the asymmetric placement of weighting elements for a unary digital-to-analog converter (DAC). The proposed sequence is based on a so-called knight’s tour according to the modified Warnsdorf’s rule. To estimate the efficiency of the proposed switching sequence, a 10-bit resistive DAC has been designed and fabricated in the UMC 180-nm technology. Experimental results show that in comparison with an array of weighting elements without compensation of the systematic error, the proposed switching sequence reduces the maximal integral (INL) and the mean INL by 20% on the average in the temperature range from ?40 °C to 85 °C. Besides that, the maximal INL does not depend on the temperature, while the mean INL decreases with temperature increase.
关键词: CMOS integrated circuits,digital–analog conversion,nonlinear circuits,dynamic range
更新于2025-09-23 15:22:29
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A D-band Multiplier-based OOK Transceiver with Supplementary Transistor Modeling in 65-nm Bulk CMOS Technology
摘要: A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly-integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor fmax and reduce DC power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a DC-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz1/2 over all D-band frequencies. The DC power consumption of the transmitter and receiver are 76 mW and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations, and demonstrates data transmission up to 10 Gbps and 2 Gbps at a distance of 0.03 m, respectively.
关键词: transceiver,transistor modeling,D-band,wireless communication,low-cost bulk CMOS,OOK
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE International Ultrasonics Symposium (IUS) - Kobe, Japan (2018.10.22-2018.10.25)] 2018 IEEE International Ultrasonics Symposium (IUS) - High Voltage Excitation and Nonlinear Transmission of a 16 MHz AlN-Based Piezoelectric Micro-Machined Ultrasonic Transducer
摘要: This paper reports the performance of a 25 μm AlGaN-based micro-piezoelectric transducer (MPT) under high voltage excitation and determination. The proposed MPT array consists of 23×28 elements fabricated on a silicon-on-insulator (SOI) substrate with 1 μm AlGaN thin film on 24 μm silicon membrane. With all the array elements electrically connected together, the electric impedance of the MPT was 11.5–7.22 kΩ at 24.7 MHz resonance frequency in air and 3.21–7.24 kΩ at 22.8 MHz when the device was water charged. The laser Doppler vibrometer (LDV) measurements showed that the transmission efficiency and the bandwidth for free vibration were 1.6 nm/V and 1.0%, respectively. The resonance modes were specifically associated with the material parameters and the initial state of the device. Moreover, nonlinear behavior was observed when increasing the input mean power exceeded 24 mW. This strategy is potentially applied to CMOS-compatible high-resolution ultrasound imaging.
关键词: AlGaN,CMOS-compatible,Ultrasound,High voltage,Micro-piezoelectric transducer
更新于2025-09-23 15:22:29
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mmWave CMOS Power Amplifiers for 5G Cellular Communication
摘要: This article covers the basics of millimeter-wave PA design in CMOS technology for integrated phased arrays, targeting the upcoming 5G new radio (NR) cellular communication standard. Key PA figures of merit, as well as application of beam-forming phased arrays to combine power over-the-air, are briefly reviewed. Then, starting from practical handset form factor constraints and system-level drivers, CMOS-specific technological and design-related challenges are conceptually illustrated using a simple single-transistor PA. A survey of the state-of-the-art is presented to give examples of the challenges and illustrate the PA techniques used to tackle them in linear 28-GHz CMOS PAs for 5G NR.
关键词: beam-forming,efficiency,linearity,millimeter-wave,power amplifier,phased array,CMOS,5G
更新于2025-09-23 15:22:29
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The Optical Barcode Detection and Recognition Method Based on Visible Light Communication Using Machine Learning
摘要: Visible light communication (VLC) has developed rapidly in recent years. VLC has the advantages of high confidentiality, low cost, etc. It could be an effective way to connect online to offline (O2O). In this paper, an RGB-LED-ID detection and recognition method based on VLC using machine learning is proposed. Different from traditional encoding and decoding VLC, we develop a new VLC system with a form of modulation and recognition. We create different features for different LEDs to make it an Optical Barcode (OBC) based on a Complementary Metal-Oxide-Semiconductor (CMOS) senor and a pulse-width modulation (PWM) method. The features are extracted using image processing and then support vector machine (SVM) and artificial neural networks (ANN) are introduced into the scheme, which are employed as a classifier. The experimental results show that the proposed method can provide a huge number of unique LED-IDs with a high LED-ID recognition rate and its performance in dark and distant conditions is significantly better than traditional Quick Response (QR) codes. This is the first time the VLC is used in the field of Internet of Things (IoT) and it is an innovative application of RGB-LED to create features. Furthermore, with the development of camera technology, the number of unique LED-IDs and the maximum identifiable distance would increase. Therefore, this scheme can be used as an effective complement to QR codes in the future.
关键词: CMOS image sensor,machine learning,image processing,RGB-LED,visible light communication (VLC)
更新于2025-09-23 15:22:29