修车大队一品楼qm论坛51一品茶楼论坛,栖凤楼品茶全国楼凤app软件 ,栖凤阁全国论坛入口,广州百花丛bhc论坛杭州百花坊妃子阁

oe1(光电查) - 科学论文

591 条数据
?? 中文(中国)
  • Trembling motion of the wave packet in armchair graphene nanoribbons (AGNRs)

    摘要: A treatment of the trembling motion or Zitterbewegung (ZB) phenomena in the armchair graphene nanoribbons (AGNRs) by using long-wave approximation is presented theoretically. We are first interested to study the time dependence of the average values for the current density in AGNR. The longitudinal and transversal components of the current density operator are derived analytically in the Heisenberg representation. The wave packet in a Gaussian distribution is considered with half-width d and a carrier wave vector in the longitudinal orientation kxo. The average values of the current density which represent the current induced by the motion of the electrons along the nanoribbon are calculated numerically. The interference between two energy branches, or the corresponding upper and lower energy states, leads to the trembling motion in the armchair graphene nanoribbon, and hence, our results emphasized that the phenomena of ZB has an aperiodic and nontransient oscillation in the longitudinal and transversal direction, respectively. The average values for the current density for AGNRs are calculated with extremely large value of N and compared with infinite pristine graphene.

    关键词: current density,Armchair graphene nanoribbon (AGNR),Zitterbewegung,wave packet,trembling motion

    更新于2025-09-23 15:22:29

  • Improvement of Electrical Performance in P-Channel LTPS Thin-Film Transistor with a-Si:H Surface Passivation

    摘要: We report the effects of surface passivation by depositing a hydrogenated amorphous silicon (a-Si:H) layer on the electrical characteristics of low temperature polycrystalline silicon thin film transistors (LTPS TFTs). The intrinsic a-Si:H layer was optimized by hydrogen dilution and its structural and electrical characteristics were investigated. The a-Si:H layer in the transition region between a-Si:H and μc-Si:H resulted in superior device characteristics. Using a-Si:H passivation layer, the field-effect mobility of the LTPS TFT was increased by 78.4% compared with conventional LTPS TFT. Moreover, the leakage current measured at VGS of 5 V was suppressed because the defect sites at the poly-Si grain boundaries were well passivated. Our passivation layer, which allows thorough control of the crystallinity and passivation-quality, should be considered as a candidate for high performance LTPS TFTs.

    关键词: LTPS TFT,leakage current,poly-Si TFT,Raman,surface passivation,FT-IR

    更新于2025-09-23 15:22:29

  • Analysis of current transport mechanisms in sol-gel grown Si/ZnO heterojunction diodes in high temperature environment

    摘要: This paper analyzes the electrical parameters of Si/ZnO heterojunction diodes in the wide temperature range, i.e. from room temperature (298 K) to 573 K to study the electrical performance of the diode in very high temperature environment. In this work, sol-gel derived nanostructured ZnO thin film was deposited directly on p-Si substrate using spin coating technique. Electrical parameters, such as rectification ratio, reverse saturation current, ideality factor, barrier height, series resistance and activation energy are derived from current-voltage characteristics of the device, measured using semiconductor parameter analyzer in the temperature range of 298 K–573 K for bias voltage of ± 5 V. The ideality factor, barrier height and series resistance is derived as 2.66, 0.789 eV and 3554 Ω respectively at 298 K, whereas at 573 K these are modified as 1.58, 1.15 eV and 801 Ω respectively. The above-mentioned results indicate the presence of spatial barrier height inhomogeneities (BHI) in high temperature environment. Hence, we have included the Gaussian distribution of spatial BHI in our analysis to calculate the effective Richardson constant (RC). Before inclusion of spatial BHI, RC was 4.026 × 10^{-6} Acm^{-2}K^{-2}. However, after inclusion of spatial BHI, RC is modified to 29.14 Acm^{-2}K^{-2}, which is nearer to the theoretical value (32 Acm^{-2}K^{-2}). Therefore, this study indicates that our as-fabricated Si/ZnO heterojunction diodes can sustain their electrical behaviour in very high temperature environment also and they are suitable for high temperature electronic and optoelectronic application.

    关键词: Current-voltage characteristics,Richardson constant,Trap-assisted tunneling,Spatial barrier inhomogeneities,Heterojunction diode,Semiconductor thin film

    更新于2025-09-23 15:22:29

  • High Channel Conductivity, Breakdown Field Strength, and Low Current Collapse in AlGaN/GaN/Si δ -Doped AlGaN/GaN:C HEMTs

    摘要: This paper reports the AlGaN/GaN/Si δ-doped AlGaN/GaN:C HEMT device on silicon with high channel conductivity, high breakdown ?eld (E-?eld) strength, and low current collapse by using the Si-doped AlGaN back barriers. The Si δ-doped AlGaN back barrier was used to compensate for the reduction of channel conductivity as a result of a carbon-doped semiinsulating GaN buffer layer. The maximum drain current increases from 412 to 720 mA/mm, and peak extrinsic transconductance is improved from 103 to 210 mS/mm. Due to the reduction of electric ?eld between the gate and drain along the GaN channel by inserting the Si δ-doped AlGaN back barrier layer, it can effectively suppress the capture of electrons in channel by carbon-induced accepted traps in the GaN:C buffer. Combined with the high conductivity of Si δ-doped AlGaN back barrier and high resistance of GaN:C buffer, the device showed the high breakdown E-?eld strength and the low speci?c on-resistance. Our proposed device is observed to hold a gate–drain voltage of 769 V at 10 μA/mm (7-μm gate–drain spacing) and 0.53 mΩ · cm2 and the gate-to-drain electric ?eld corresponds to 1.1 MV/cm.

    关键词: high channel conductivity,high-voltage device,Si δ-doped AlGaN back barrier,GaN,Current collapse (CC)

    更新于2025-09-23 15:22:29

  • 43- and 50-Mp High-Performance Interline CCD Image Sensors

    摘要: This paper describes the design and performance of two new high-resolution interline charge-coupled device image sensors for use in industrial, machine vision, and aerial photography applications. These sensors feature 4.5-μm pixels, 4 outputs, fast dump gate, horizontal lateral overflow drain, and vertical electronic shutter. The 43-Mp sensor has a 35-mm optical format and the 50-Mp sensor has a larger format with a 2.175:1 aspect ratio that matches many modern mobile phone displays. This paper discusses the challenges and solutions to manufacture such large sensors with superior image quality such as uniformity, read noise, dark current, smear, transfer gate blooming, lag, and so on.

    关键词: dark current,lithography stitching,interline transfer (IT),stepper,multiple outputs,image sensor,large format,charge-coupled device (CCD),smear,Blooming

    更新于2025-09-23 15:22:29

  • Exploiting lateral current flow due to doped layers in semiconductor devices having crossbar electrodes

    摘要: Organic electronic devices such as light-emitting diodes, solar cells or rectifying diodes normally have a sandwich layer architecture stacked between the electrodes in a crossbar layout. Often however, the side effects of operating the devices in such an arrangement are either ignored or give rise to misinterpretations regarding the device performance or layer quality. For the sake of simplicity, device currents are typically assumed to exclusively flow in the direction vertical to the substrate, even though the conductivity of doped organic layers is high and gives rise to significant lateral current flows. Here, we study the vertical and lateral charge up along the n-doped and the p-doped layers as well as the resulting capacitance increase of charging the intrinsic layer outside the active area. We observe that controlling such lateral charging by structuring the doped layers can reduce the leakage current dramatically. We employ impedance spectroscopy to investigate the lateral charging responsibility for the capacitance increase at low frequencies. Modeling of the devices by a distributed RC circuit model yields information about the thickness, the conductivity, and the corresponding activation energy of both, the n-doped and the p-doped layers, simultaneously. We demonstrate that the capacitive effects from lateral charging can easily be misinterpreted as trap states in capacitance frequency characteristics. However, correct analysis with the proposed model actually yields rich and detailed post-fabrication information which can be utilized in device failure and degradation tests. Moreover, our results will aid the design and characterization of new electronic devices where lateral charge flow is part of the device concept.

    关键词: Parasitic current,Leakage current,Impedance spectroscopy,Crossbar electrodes,Lateral current flow,Organic light-emitting diode,Capacitance,Organic solar cell,Structuring

    更新于2025-09-23 15:21:21

  • [IEEE 2018 31st International Vacuum Nanoelectronics Conference (IVNC) - Kyoto, Japan (2018.7.9-2018.7.13)] 2018 31st International Vacuum Nanoelectronics Conference (IVNC) - Field emission current investigation of p-type and metallized silicon emitters in the frequency domain

    摘要: We investigated two different field emitter arrays consisting of 10×10 p-type and 10×10 undoped Au-coated high aspect ratio silicon tips. The I-V characterization of the p-type sample showed a pronounced saturation for voltages higher than 500 V and a maximum emission current of 39 nA. The metallized sample revealed a FN-like emission up to several μA. The metallized and the p-type sample operating below the saturation region showed high current fluctuations of ±16%. Whereas, the metallized sample with current regulation and the p-type sample in the saturation yielded a current stability of ±0.4% and ±0.3%, respectively. Investigations in the frequency domain revealed the for field emission typical 1/f-noise. By operating in the saturation region (p-type sample) or using an emission current regulation (metallized sample) the noise level was reduced by at least 20 dB. Finally, the p-type sample was illuminated by a light emitting diode to increase and modulate the emission current in the saturation region. The emission current was increased by a factor of 3.7 to 145 nA. With this configuration we emulated an unstable emission behavior and evaluated the performance of our emission current regulation circuit.

    关键词: field emitter array,current stability,current fluctuation,field emission noise,field emission,silicon tip

    更新于2025-09-23 15:21:21

  • The effect of alternating current on the current states of a quantum interferometer shunted by a superconducting inductance

    摘要: The patterns of reversible changes in the critical current and discrete current states of a structure in the form of a superconducting quantum interferometer shunted by superconducting inductance, as a result of passing an alternating transport current through the structure and applying an external alternating magnetic field simultaneously with a direct transport current, was established. A new type of discrete stationary state was discovered during the transition of the interferometer to the resistive state caused by the combined action of direct and alternating transport currents.

    关键词: resistive state,superconducting inductance,alternating current,superconducting quantum interferometer,discrete current states

    更新于2025-09-23 15:21:21

  • Apply DFT Integrated Enhanced EBAC Methodology on Defect Isolations

    摘要: Design for test (DFT) has been widely applied to digital circuit failure analysis (FA) in semiconductor industries. The FA methods based on DFT involve layer-by-layer checks using a polisher and an SEM for defect identification and localization. Yet these methods have limitations with high risks of sample damages. Besides, they are highly dependent on the technical proficiencies of operators and, thus, they are not effective for precise defect isolations. This problem has been aggravated, especially at advanced nodes. The nano-probing electron beam absorbed current (EBAC) has significant advantages on precisely locating defects. This technique is to directly identify specific defects without layer-by-layer checks. Therefore, it can minimize sample damages during sample pretreatment. EBAC is an efficient technique to isolate the defects when the circuit is at the floating condition. Because the ground lines exist almost everywhere in a chip and they are for, e.g., electronic static discharge charge releases or connecting with sources for pickup, EBAC becomes a natural option for us. However, due to poor EBAC images, EBAC’s applications are restricted when the circuits under test have grounding paths. In this paper, we propose two enhanced EBAC analysis methods, based on the DFT and EBAC integrated system, for the defect isolations with grounded connections. It is the first time the DFT and EBAC integrated system is reported, and we successfully demonstrated EBAC applicability by real FA cases.

    关键词: Design for test (DFT),Grounding line,Fault isolation,Electron beam absorbed current (EBAC),Failure analysis (FA)

    更新于2025-09-23 15:21:21

  • Phase field modeling of grain boundary migration and preferential grain growth driven by electric current stressing

    摘要: A phase field model incorporating the electrostatic free energy and the grain orientation effect is developed and employed to study the grain boundary migration and preferential grain growth in widely used beta-tin (β-Sn) under electric current stressing. The directional migration of grain boundaries and the preferential growth of the grain with its orientation having low electrical resistivity along the electric current direction are theoretically clarified. In a bicrystal system containing a circular grain, the shrinkage velocity and morphology changes of grains are dominated by the competition effect between the grain boundary energy and the electrostatic free energy; in particular, the high-density electric current can induce the instability of grain morphology evolution. Moreover, grain morphology evolution leads to the change of the voltage across the β-Sn system; it is found that the voltage decreases over time in a tricrystal system, while the variation of the voltage across the bicrystal system is related to the above-mentioned competition effect. The proposed model and results provide insights into the orientation-related microstructure evolution under electric current stressing.

    关键词: preferential grain growth,electric current stressing,microstructure evolution,grain boundary migration,beta-tin,phase field model

    更新于2025-09-23 15:21:21