研究目的
To present a linear-mode LiDAR analog front-end architecture with multiplex ADC/TDC that reduces hardware cost and power consumption while maintaining performance.
研究成果
The proposed LiDAR analog front-end architecture with multiplex ADC/TDC demonstrates significant reductions in hardware cost and power consumption while achieving a 60 m measurement range under direct sunlight with low laser power. This architecture is suitable for low-cost multi-line integrated LiDAR applications.
研究不足
The study is limited to a single-line APD-based LiDAR system and may not account for all variations in multi-line systems or different environmental conditions.
1:Experimental Design and Method Selection:
The study employs a linear-mode LiDAR analog front-end architecture with multiplex ADC/TDC, utilizing a VTC and a reused TDC to replace discrete ADC and TDC. A three-stage inverter-based TIA is proposed for ultra-low-power, low-noise, and high/low gain mode operation.
2:Sample Selection and Data Sources:
The prototype TIA and ADC/TDC are fabricated in 65-nm CMOS technology and integrated into a single-line APD-based LiDAR system.
3:List of Experimental Equipment and Materials:
The system includes a TIA, ADC/TDC, and APD-based LiDAR components fabricated in 65-nm CMOS technology.
4:Experimental Procedures and Operational Workflow:
The receiver front-end's power consumption and minimum detection current are measured under various conditions, including direct sunlight.
5:Data Analysis Methods:
The performance of the LiDAR system is evaluated based on power consumption, detection current, and measurement range under specified conditions.
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