研究目的
Investigating the mechanisms behind silicon bulk lifetime degradation during anneal in III-V material growth chambers and proposing methods to preserve silicon bulk lifetime.
研究成果
Thermal activation of grown-in defects in float zone wafers is a key mechanism behind silicon bulk lifetime degradation during III-V material growth. Annealing above 950 ?C and the use of a SiNX diffuse barrier layer are effective in preserving silicon bulk lifetime.
研究不足
The study focuses on float zone silicon wafers and may not be directly applicable to other types of silicon wafers. The effectiveness of thicker oxides as diffuse barriers was not investigated.
1：Experimental Design and Method Selection:
The study investigates both extrinsic and intrinsic origins of silicon lifetime degradation, focusing on grown-in defects in float zone wafers and the effectiveness of SiNX diffuse barrier layers.
2：Sample Selection and Data Sources:
Three inch, 350 μm, 1-5 Ω · cm p-type doped offcut FZ silicon wafers from Virginia Semiconductor were used.
3：List of Experimental Equipment and Materials:
Veeco GEN930 molecular beam epitaxy (MBE) system, SEMCO oxidation furnace, Tempress AMTECH furnace, Sinton WCT-120 lifetime tool, BT Imaging LIS-R1 PL imaging system.
4：Experimental Procedures and Operational Workflow:
Wafers were cleaned using RCA procedures, annealed at various temperatures, and passivated with iodine ethanol solution. Lifetime measurements were performed using QSSPC method.
5：Data Analysis Methods:
Lifetime and PL images were analyzed to assess the impact of annealing and barrier layers on silicon bulk lifetime.
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