研究目的
To propose and validate a universal metal etching method for alleviating pinhole defects in inter-metal dielectric films to prevent short-circuit or current leakage in integrated circuits and MEMS devices.
研究成果
The proposed metal etching method effectively alleviates pinhole defects in IMD films by creating larger etched areas that prevent electrical shorts. It is feasible, valid, operable, and reliable for metal features of 15-100 μm, with most etched profiles between 2-5 μm. The method improves electrical insulation significantly and can be applied to various IMD-based applications without requiring transparent substrates or high temperatures.
研究不足
The method requires specific etchant conditions (e.g., temperature 50-60°C, time 25 min) and may not be suitable for very small pinholes or large metal features (electrode widths >100 μm due to thermal stress cracking). It is limited to materials compatible with the etchants used (e.g., Ti and Au).
1:Experimental Design and Method Selection:
The study involves a series of experiments to evaluate the feasibility, validity, operability, and reliability of a metal etching method. The method uses wet etching with specific etchants to isotropically etch underlying metals through pinholes in IMD films, creating larger metal-free areas to prevent electrical connections after upper metal deposition.
2:Sample Selection and Data Sources:
Samples were prepared on 4-inch silicon wafers with a 300 nm thermal oxide layer. Metal layers (Ti/Au) and IMD layers (SiO2) were deposited using electron-beam evaporation and PECVD, respectively. Pinholes were intentionally present due to deposition imperfections.
3:List of Experimental Equipment and Materials:
Equipment includes electron-beam evaporator for metal deposition, PECVD system for SiO2 deposition, optical microscope, SEM, interferometric profiler, semiconductor device analyzer, and oven for thermal cycling. Materials include silicon wafers, titanium, gold, silicon dioxide, gold etchant (mixture of I2, NH4I, ethanol), and titanium etchant (mixture of NH4OH, H2O2).
4:2). Experimental Procedures and Operational Workflow:
4. Experimental Procedures and Operational Workflow: Process flow: Deposit Metal 1 (Ti/Au) on substrate, pattern by lift-off; deposit IMD (SiO2) by PECVD; immerse in etchants (gold etchant for 25 min, titanium etchant for 2 min) to etch through pinholes; deposit Metal 2 (Ti/Au); perform electrical and optical characterizations.
5:Data Analysis Methods:
Optical and SEM imaging for pinhole observation; electrical testing with semiconductor device analyzer to measure current density vs. applied field; statistical analysis of etched profile sizes and thermal cycling effects.
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white-light interferometric 3D profiler
ZYGO New View 7100
ZYGO
Observing surface profiles and pinholes in samples
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scanning electron microscope
ZEISS SIGMA
ZEISS
Observing pinholes using electron imaging
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optical microscope
OLYMPUS BX51M
OLYMPUS
Observing pinholes and etched profiles
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semiconductor device analyzer
Keysight B1500A
Keysight
Measuring electrical characteristics such as current density
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PECVD system
Oxford Instruments Plasma Pro NGP80
Oxford Instruments
Depositing silicon dioxide films
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electron-beam evaporator
Depositing titanium and gold metal layers
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gold etchant
Etching gold metal through pinholes
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titanium etchant
Etching titanium metal
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