研究目的
To enhance the carrier mobility of phosphorene and device performance via strain engineering for terahertz transistors.
研究成果
Strain engineering significantly enhances the carrier mobility of monolayer phosphorene, particularly in the zigzag direction under 7-10% tensile strain, leading to ultrahigh hole mobility and enabling terahertz-frequency transistors with high cut-off frequencies, making it a promising candidate for RF applications.
研究不足
The study is theoretical and computational, relying on DFT and TCAD simulations without experimental validation. Strain application is limited to 10% based on practical experimental constraints, and the focus is on specific directions and layer numbers, potentially missing broader effects.
1：Experimental Design and Method Selection:
The study uses density functional theory (DFT) calculations with Vienna ab initio simulation package (VASP) to investigate the electronic structure of few-layer phosphorene under strain. Methods include GGA-PBE and HSE functionals with van der Waals corrections.
2：Sample Selection and Data Sources:
Focuses on monolayer, bilayer, and trilayer phosphorene under uniaxial tensile strains up to 10% in zigzag and armchair directions.
3：List of Experimental Equipment and Materials:
Computational tools include VASP for DFT calculations and Silvaco TCAD for device simulation. Materials involve phosphorene layers.
4：Experimental Procedures and Operational Workflow:
Lattice constants are optimized under strain; band structures are calculated to derive effective mass, deformation potential, and elastic modulus; carrier mobility is computed using a phonon-limited scattering model; device performance is simulated with Silvaco Atlas.
5：Data Analysis Methods:
Data analysis involves calculating mobility from band structure parameters and simulating FET performance to determine cut-off frequency.
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