研究目的
To demonstrate the fabrication and performance of ion-implant isolated vertical GaN p-n junction diodes using epitaxial lift-off (ELO) from GaN substrates, and to compare their electrical characteristics with mesa-etched isolated devices and control samples without ELO processing.
研究成果
The ELO process for ion-implant isolated vertical GaN p-n diodes does not degrade material quality or electrical performance compared to control samples, with similar turn-on voltages, ideality factors, breakdown voltages, and leakage currents. This demonstrates the potential of ELO for cost-effective production of GaN power devices by enabling substrate reuse and improved thermal management.
研究不足
The study is limited to specific device designs and process flows; the ELO process may not be fully optimized for all GaN devices, and the use of unoptimized cathode contacts in ELO devices leads to higher series resistance. The scalability and industrial applicability of the ELO technique for large-scale production are not extensively addressed.
1：Experimental Design and Method Selection:
The study involves fabricating vertical GaN p-n diodes with ion-implant isolation and ELO processing. A band-gap selective photoelectrochemical (PEC) wet etch with a pseudomorphic InGaN release layer is used for ELO. Devices are compared with mesa-etched isolated diodes and control samples without ELO.
2：Sample Selection and Data Sources:
Epitaxial layers are grown by metal organic chemical vapor deposition (MOCVD) on hydride vapor phase epitaxy (HVPE)-grown bulk GaN substrates with low threading dislocation density. Control samples without the InGaN release layer are also fabricated.
3：List of Experimental Equipment and Materials:
Equipment includes MOCVD and HVPE systems for growth, ICP-RIE for etching, sputtering for SiNx deposition, electroplating for metal support, PEC setup for ELO, evaporation for cathode contacts, and bonding using nanosilver paste. Materials include GaN substrates, InGaN release layer, p-type and n-type GaN layers, metals for contacts (Ni/Au, Pd/Ni/Au, Ti/Al/Ni/Au, Ti/Au), SiNx passivation layer, and alumina carriers.
4：Experimental Procedures and Operational Workflow:
Fabrication involves growing epitaxial layers, developing ohmic contacts with surface pretreatment, performing ion-implantation for isolation, etching trenches, depositing passivation and support layers, conducting ELO processing, depositing cathode contacts, bonding to carriers, and removing support metalization. Electrical measurements are performed using source-measurement units.
5：Data Analysis Methods:
Electrical characteristics (I-V, ideality factor, specific on resistance, breakdown voltage, capacitance-voltage) are measured and analyzed. Contact resistances are evaluated using circular transfer length method (CTLM).
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