研究目的
To achieve higher Q factor inductors by designing and fabricating 3D integration inductors based on through glass via (TGV) technology, reducing losses caused by MOS parasitic capacitors.
研究成果
Ultra-high Q factor 3D integration inductors are achieved using glass substrate and TGV technology, with Q factors over 45 demonstrated. The 3D structure significantly improves Q factor compared to 2D inductors or silicon-based ones, making TGV technology an effective choice for enhancing integrated passive device performance.
研究不足
The paper does not explicitly mention specific limitations, but potential areas for optimization could include further reducing losses and improving fabrication processes for higher aspect ratio vias.
1：Experimental Design and Method Selection:
The study uses through glass via (TGV) technology to design and fabricate 3D integration inductors on glass substrate, with simulations performed using HFSS software to investigate the effect of substrate material and structure on inductor performance.
2：Sample Selection and Data Sources:
A photosensitive glass wafer is used as the substrate, selected for its high resistivity and low substrate losses.
3：List of Experimental Equipment and Materials:
Includes a photosensitive glass wafer, UV light for exposure, HF acid for etching, PVD for Ti and Cu deposition, electroplating equipment for Cu filling, and HFSS software for simulations.
4：Experimental Procedures and Operational Workflow:
The process involves exposing the glass to UV to form latent images, thermal treatment for crystallization, etching with HF acid and ultrasonic to create TGV vias, depositing Ti barrier layer and Cu seed layer via PVD, electroplating Cu to fill vias, thinning the glass substrate, and electroplating redistribution layers.
5：Data Analysis Methods:
The Q factor and inductance of the fabricated inductors are tested and compared with simulations from HFSS.
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