研究目的
To propose a simple method for adjusting the trigger voltage of SiGe Heterojunction Bipolar Transistor (HBT) devices for ESD protection in SiGe BiCMOS technology.
研究成果
The trigger voltage of HBT devices can be effectively adjusted by varying the emitter junction area, with trigger voltages ranging from 4.8V to 7.7V as the emitter width changes from 1.15μm to 3.0μm. The holding voltage remains constant, and ESD robustness improves with larger emitter areas. Temperature increases reduce trigger voltage and robustness due to changes in current amplification factor.
研究不足
The method is specific to SiGe BiCMOS technology and may not be directly applicable to other semiconductor processes. Temperature variations affect trigger voltage and robustness, indicating potential sensitivity to environmental conditions.
1：Experimental Design and Method Selection:
The study uses TCAD simulations to investigate the trigger process of HBT devices, calibrated with mobility, high field velocity saturation, and avalanche generation models. Experiments involve fabricating HBT devices with varying emitter junction areas and testing them using a transmission line pulsing (TLP) tester.
2：Sample Selection and Data Sources:
HBT devices are fabricated in a SiGe BiCMOS process with different emitter junction widths (1.15μm, 2.5μm, 3.0μm) and eight emitter fingers each of 50μm length.
3：15μm, 5μm, 0μm) and eight emitter fingers each of 50μm length.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: A TLP tester is used to generate HBM-like pulses with 10 ns rising time and 100 ns pulse width. The HBT devices are the primary materials under test.
4：Experimental Procedures and Operational Workflow:
Simulations are performed to analyze electrostatic potential, impact ionization, and current distributions under different conditions. Experimental tests measure I-V characteristics and leakage currents at various temperatures (25°C, 75°C, 125°C).
5：Data Analysis Methods:
Data from simulations and TLP tests are analyzed to determine trigger voltages, holding voltages, and failure currents, with comparisons made based on emitter junction area and temperature effects.
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