- 标题
- 摘要
- 关键词
- 实验方案
- 产品
-
[IEEE 2018 International Semiconductor Conference (CAS) - Sinaia (2018.10.10-2018.10.12)] 2018 International Semiconductor Conference (CAS) - Interface Trap Effects in the Design of a 4H-SiC MOSFET for Low Voltage Applications
摘要： The current-voltage characteristics of a 4H-SiC MOSFET dimensioned for a breakdown voltage of 650 V are investigated by means of a numerical simulation study that takes into account the defect state distribution at the oxide-semiconductor interface in the channel region. The modelling analysis reveals that, for these low-voltage devices, the channel resistance component plays a key role in determining the MOSFET specific ON-state resistance (RON) under different voltage biases and temperatures. The RON value is in the order of a few mΩ×cm2.
关键词： numerical simulations,power devices,ON-state resistance,4H-SiC,defects states
更新于2025-09-23 15:23:52
-
A review of the most recent progresses of state-of-art gallium oxide power devices
摘要： Until very recently, gallium oxide (Ga2O3) has aroused more and more interests in the area of power electronics due to its ultra-wide bandgap of 4.5–4.8 eV, estimated critical field of 8 MV/cm and decent intrinsic electron mobility limit of 250 cm2/(V·s), yielding a high Baliga’s figures-of-merit (FOM) of more than 3000, which is several times higher than GaN and SiC. In addition to its excellent material properties, potential low-cost and large size substrate through melt-grown methodology also endows β-Ga2O3 more potential for future low-cost power devices. This article focuses on reviewing the most recent advances of β-Ga2O3 based power devices. It will be starting with a brief introduction to the material properties of β-Ga2O3 and then the growth techniques of its native substrate, followed by the thin film epitaxial growth. The performance of state-of-art β-Ga2O3 devices, including diodes and FETs are fully discussed and compared. Finally, potential solutions to the challenges of β-Ga2O3 are also discussed and explored.
关键词： power electronics,power devices,gallium oxide
更新于2025-09-23 15:22:29
-
[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Sub-stochiometric MoO <sub/>3</sub> for intermediate band solar cells
摘要： This paper proposes a novel scalable digit-serial inverter structure with low space complexity to perform inversion operation in GF(2m) based on a previously modi?ed extended Euclidean algorithm. This structure is suitable for ?xed size processor that only reuse the core and does not require to modulate the core size when m modi?ed. This structure is extracted by applying a nonlinear methodology that gives the designer more ?exibility to control the processing element workload and also reduces the overhead of communication between processing elements. Implementation results of the proposed scalable design and previously reported ef?cient designs show that the proposed scalable structure achieves a signi?cant reduction in the area ranging from 83.0% to 88.3% and also achieves a signi?cant saving in energy ranging from 75.0% to 85.0% over them, but it has lower throughput compared to them. This makes the proposed design more suitable for constrained implementations of cryptographic primitives in ultra-low power devices such as wireless sensor nodes and radio frequency identi?cation (RFID) devices.
关键词： Scalable systolic arrays,?nite ?eld inversion,ultra-low power devices,hardware security,ASIC
更新于2025-09-23 15:19:57
-
[IEEE 2019 IEEE 15th Brazilian Power Electronics Conference and 5th IEEE Southern Power Electronics Conference (COBEP/SPEC) - Santos, Brazil (2019.12.1-2019.12.4)] 2019 IEEE 15th Brazilian Power Electronics Conference and 5th IEEE Southern Power Electronics Conference (COBEP/SPEC) - On the Influence of Area Variations of the Photovoltaic ;Surface in Solar Cell Antennas
摘要： Some low power applications where antennas and solar cells are integrated into the same system have limitations and requirements imposed by the radiation characteristics that, usually, are ful?lled by varying solar cell physical parameters. The negative in?uences of those variations are not profoundly discussed in the literature that studies the extremely low-power systems, where radiofrequency and photovoltaic devices share the same structure. In this context, this work models a photovoltaic cell used as an antenna and analyzes the consequences of the solar cell area variation, imposed by the fabrication process of the radiating element. The parameters of the one-diode equivalent circuit model are extracted and used to simulated the I-V curves for different irradiance levels, validating the simulations with experimental measurements performed in the laboratory. Also, the solar cell ?ll factor, energy conversion ef?ciency, and current density are analyzed.
关键词： low power devices,Solar cell modeling,energy harvesting,solar cell and antenna integration
更新于2025-09-23 15:19:57
-
Empty Substrate Integrated Waveguide Fed Patch Antenna Array for 5G mm-Wave Communication Systems
摘要： This paper proposes a novel scalable digit-serial inverter structure with low space complexity to perform inversion operation in GF(2m) based on a previously modi?ed extended Euclidean algorithm. This structure is suitable for ?xed size processor that only reuse the core and does not require to modulate the core size when m modi?ed. This structure is extracted by applying a nonlinear methodology that gives the designer more ?exibility to control the processing element workload and also reduces the overhead of communication between processing elements. Implementation results of the proposed scalable design and previously reported ef?cient designs show that the proposed scalable structure achieves a signi?cant reduction in the area ranging from 83.0% to 88.3% and also achieves a signi?cant saving in energy ranging from 75.0% to 85.0% over them, but it has lower throughput compared to them. This makes the proposed design more suitable for constrained implementations of cryptographic primitives in ultra-low power devices such as wireless sensor nodes and radio frequency identi?cation (RFID) devices.
关键词： ?nite ?eld inversion,Scalable systolic arrays,ASIC,ultra-low power devices,hardware security
更新于2025-09-23 15:19:57
-
[IEEE 2018 IEEE International Conference on Computational Electromagnetics (ICCEM) - Chengdu (2018.3.26-2018.3.28)] 2018 IEEE International Conference on Computational Electromagnetics (ICCEM) - A Compact Graphene-Based Six-Way Power Divider
摘要： Because of the nature of multilayered structure and their metal characteristics, it is difficult to conduct failure analysis on multilayer-metal-packaged power devices with abnormal thermal characteristics using conventional techniques. In order to overcome this challenge, a systematic solution is proposed. Firstly, the failure cause of abnormal thermal response for power devices is identified as the problem of heat dissipation through electrical tests and analysis of diode forward voltage (VSD) curves. Secondly, specific failure sites of power devices were located by the structure function analysis and the X-CT test. Finally, the failure site was analyzed by physical failure analysis techniques, and the specific failure cause was validated and further analyzed by microscopic observations and EDS. It was found that the oxidation of back metallization led to the formation of solder voids which resulted in the above failure.
关键词： Multilayered structure,Oxidation of back metallization,Thermal response,Power devices
更新于2025-09-19 17:15:36
-
Fully-vertical GaN-on-Si power MOSFETs
摘要： We report the first demonstration of fully-vertical power MOSFETs on 6.6-μm-thick GaN grown on a 6-inch Si substrate by metal-organic chemical vapor deposition (MOCVD). A robust fabrication method was developed based on a selective and local removal of the Si substrate as well as the resistive GaN buffer layers, followed by a conformal deposition of a 35-μm-thick copper layer on the backside by electroplating, which provides excellent mechanical stability and electrical contact to the drain terminal. The fabrication process of the gate trench was optimized, improving considerably the effective mobility at the p-GaN channel and the output current of the devices. High performance fully-vertical GaN-on-Si MOSFETs are presented, with low specific on-resistance (Ron,sp) of 5 m?cm2 and high off-state breakdown voltage (BV) of 520 V. Our results reveal a major step towards the realization of high performance GaN vertical power devices on cost-effective Si substrates.
关键词： power devices,GaN,low Ron,sp,GaN-on-Si,fully-vertical,MOSFETs,vertical,high breakdown
更新于2025-09-19 17:15:36
-
[IEEE 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - Sozopol, Bulgaria (2019.9.6-2019.9.8)] 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - Machining Error Influnce on Stress State of Conical Thread Joint Details
摘要： This paper proposes a novel scalable digit-serial inverter structure with low space complexity to perform inversion operation in GF(2m) based on a previously modi?ed extended Euclidean algorithm. This structure is suitable for ?xed size processor that only reuse the core and does not require to modulate the core size when m modi?ed. This structure is extracted by applying a nonlinear methodology that gives the designer more ?exibility to control the processing element workload and also reduces the overhead of communication between processing elements. Implementation results of the proposed scalable design and previously reported ef?cient designs show that the proposed scalable structure achieves a signi?cant reduction in the area ranging from 83.0% to 88.3% and also achieves a signi?cant saving in energy ranging from 75.0% to 85.0% over them, but it has lower throughput compared to them. This makes the proposed design more suitable for constrained implementations of cryptographic primitives in ultra-low power devices such as wireless sensor nodes and radio frequency identi?cation (RFID) devices.
关键词： ?nite ?eld inversion,Scalable systolic arrays,ASIC,ultra-low power devices,hardware security
更新于2025-09-19 17:13:59
-
Overview of Recent Progress of Semiconductor Power Devices based on Wide Bandgap Materials
摘要： Wide bandgap materials, which have shown superior material properties, such as better thermal conductivity and excellent electric performance, have aroused wide concern from scientists and engineers. Currently, research towards semiconductor power devices based on wide bandgap materials has made great achievements. The new developed WBG (wide bandgap) power devices, such as 1200V Direct-Driven SiC JFET power switch and highly reliable GaN MOS HFET displayed better performances and advantages, comparing to traditional Si based power devices. These power devices have been widely used in variety of applications with its successful commercialization, which convincingly proved their reliability and effectiveness. The usage of WBG power devices greatly improved the circuit performance, contributed to the evolve of the new generation electric products. In this paper, we mainly focus on introducing recent progresses and research results of several type of power devices based on WBG materials, including GaN, IGBT, JFET, MOSFET, rectifiers and their SiC counterparts. Their characteristics, performances and relevant applications will be discussed and compared respectively. Then, some deficiency and limits of these devices, as well as solutions of these defects will be illustrated. Finally, future developments and prospects of WBG power devices will be analyzed.
关键词： rectifiers,GaN,IGBT,MOSFET,wide bandgap materials,SiC,JFET,semiconductor power devices
更新于2025-09-11 14:15:04
-
SOI wafer fabricated with a diamond BOX layer using surface activated bonding at room temperature
摘要： We propose a fabrication process for a silicon on insulator (SOI) wafer with a diamond buried oxide (BOX) layer by combining nanodiamond-seeding deposition and a surface-activated bonding technique for high-frequency and power device applications. The diamond layer was deposited on a base wafer by the spin-coating of nanodiamonds and microwave-plasma-enhanced chemical vapor deposition. The thermal conductivity of this deposited diamond layer was three times that of a conventional SiO2 layer. A silicon wafer was then bonded to the diamond layer at room temperature in ultrahigh vacuum without forming any voids. Additionally, this SOI wafer was used to fabricate devices at 1000 °C. Therefore, we believe that this SOI wafer with a diamond BOX layer and its fabrication process are important for the realization of self-heating devices such as next-generation high-frequency and power devices.
关键词： SOI wafer,surface-activated bonding,high-frequency devices,power devices,diamond BOX layer
更新于2025-09-10 09:29:36